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-rw-r--r--src/soc/imgtec/pistachio/include/soc/memlayout.ld5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/imgtec/pistachio/include/soc/memlayout.ld b/src/soc/imgtec/pistachio/include/soc/memlayout.ld
index e9f6c592fe..bc6744741d 100644
--- a/src/soc/imgtec/pistachio/include/soc/memlayout.ld
+++ b/src/soc/imgtec/pistachio/include/soc/memlayout.ld
@@ -42,7 +42,10 @@ SECTIONS
PRERAM_CBFS_CACHE(0x1a00e000, 72K)
SRAM_END(0x1a020000)
- /* Bootblock executes out of KSEG0 and sets up the identity mapping. */
+ /* Bootblock executes out of KSEG0 and sets up the identity mapping.
+ * This is identical to SRAM above, and thus also limited 64K and
+ * needs to avoid conflicts with items set up above.
+ */
BOOTBLOCK(0x9a000000, 20K)
/*