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-rw-r--r--src/soc/amd/common/block/include/amdblocks/cppc.h2
-rw-r--r--src/soc/amd/common/fsp/Kconfig3
-rw-r--r--src/soc/amd/common/fsp/Makefile.inc1
-rw-r--r--src/soc/amd/common/fsp/fsp_ccx_cppc_hob.c64
4 files changed, 70 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/cppc.h b/src/soc/amd/common/block/include/amdblocks/cppc.h
index 7961f60794..aed7693a41 100644
--- a/src/soc/amd/common/block/include/amdblocks/cppc.h
+++ b/src/soc/amd/common/block/include/amdblocks/cppc.h
@@ -8,5 +8,7 @@
struct cppc_config;
void generate_cppc_entries(unsigned int core_id);
+enum cb_err get_ccx_cppc_min_frequency(uint32_t *freq);
+enum cb_err get_ccx_cppc_nom_frequency(uint32_t *freq);
#endif /* AMD_CEZANNE_CPPC_H */
diff --git a/src/soc/amd/common/fsp/Kconfig b/src/soc/amd/common/fsp/Kconfig
index 81fe29809a..885e250fc6 100644
--- a/src/soc/amd/common/fsp/Kconfig
+++ b/src/soc/amd/common/fsp/Kconfig
@@ -3,6 +3,9 @@ if PLATFORM_USES_FSP2_0
config SOC_AMD_COMMON_FSP_DMI_TABLES
bool
+config SOC_AMD_COMMON_FSP_CCX_CPPC_HOB
+ bool
+
source "src/soc/amd/common/fsp/*/Kconfig"
endif # PLATFORM_USES_FSP2_0
diff --git a/src/soc/amd/common/fsp/Makefile.inc b/src/soc/amd/common/fsp/Makefile.inc
index eac9e0636d..251e4a7f83 100644
--- a/src/soc/amd/common/fsp/Makefile.inc
+++ b/src/soc/amd/common/fsp/Makefile.inc
@@ -3,6 +3,7 @@ romstage-y += fsp_reset.c
romstage-y += fsp_validate.c
ramstage-y += fsp_reset.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fsp-acpi.c
+ramstage-$(CONFIG_SOC_AMD_COMMON_FSP_CCX_CPPC_HOB) += fsp_ccx_cppc_hob.c
ramstage-$(CONFIG_SOC_AMD_COMMON_FSP_DMI_TABLES) += dmi.c
subdirs-y += ./*
diff --git a/src/soc/amd/common/fsp/fsp_ccx_cppc_hob.c b/src/soc/amd/common/fsp/fsp_ccx_cppc_hob.c
new file mode 100644
index 0000000000..6e615ddeb5
--- /dev/null
+++ b/src/soc/amd/common/fsp/fsp_ccx_cppc_hob.c
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <amdblocks/cppc.h>
+#include <ccx_cppc_data.h>
+#include <console/console.h>
+#include <FspGuids.h>
+#include <fsp/util.h>
+#include <string.h>
+#include <types.h>
+
+
+static enum cb_err get_ccx_cppc_data_hob(const struct fsp_ccx_cppc_data **cppc_data)
+{
+ static const struct fsp_ccx_cppc_data *cppc_data_cache;
+ size_t hob_size = 0;
+ const struct fsp_ccx_cppc_data *hob;
+
+ if (cppc_data_cache) {
+ *cppc_data = cppc_data_cache;
+ return CB_SUCCESS;
+ }
+
+ hob = fsp_find_extension_hob_by_guid(AMD_FSP_CCX_CPPC_DATA_HOB_GUID.b, &hob_size);
+
+ if (hob == NULL || hob_size < sizeof(struct fsp_ccx_cppc_data)) {
+ printk(BIOS_ERR, "Couldn't find CCX CPPC data HOB.\n");
+ return CB_ERR;
+ }
+
+ if (hob->version != FSP_CCX_CPPC_DATA_VERSION) {
+ printk(BIOS_ERR, "Unexpected CCX CPPC data HOB version.\n");
+ return CB_ERR;
+ }
+
+ cppc_data_cache = hob;
+ *cppc_data = cppc_data_cache;
+ return CB_SUCCESS;
+}
+
+enum cb_err get_ccx_cppc_min_frequency(uint32_t *freq)
+{
+ const struct fsp_ccx_cppc_data *cppc_data = NULL;
+
+ if (get_ccx_cppc_data_hob(&cppc_data) != CB_SUCCESS)
+ return CB_ERR;
+
+ *freq = cppc_data->ccx_cppc_min_speed;
+ printk(BIOS_SPEW, "CCX CPPC min speed: %d MHz\n", *freq);
+
+ return CB_SUCCESS;
+}
+
+enum cb_err get_ccx_cppc_nom_frequency(uint32_t *freq)
+{
+ const struct fsp_ccx_cppc_data *cppc_data = NULL;
+
+ if (get_ccx_cppc_data_hob(&cppc_data) != CB_SUCCESS)
+ return CB_ERR;
+
+ *freq = cppc_data->ccx_cppc_nom_speed;
+ printk(BIOS_SPEW, "CCX CPPC nom speed: %d MHz\n", *freq);
+
+ return CB_SUCCESS;
+}