5 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index bcf1420b3f..37aaf82360 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -81,7 +81,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 	return acpi_madt_irq_overrides(current);
 }
 
-void acpi_fill_fadt(acpi_fadt_t * fadt)
+void acpi_fill_fadt(acpi_fadt_t *fadt)
 {
 	const uint16_t pmbase = ACPI_PMIO_BASE;
 
diff --git a/src/soc/intel/apollolake/flash_ctrlr.c b/src/soc/intel/apollolake/flash_ctrlr.c
index a608ca700c..aec29bc399 100644
--- a/src/soc/intel/apollolake/flash_ctrlr.c
+++ b/src/soc/intel/apollolake/flash_ctrlr.c
@@ -116,7 +116,7 @@ static void fill_xfer_fifo(struct spi_flash_ctx *ctx, const void *data,
 	len = min(len, SPIBAR_FDATA_FIFO_SIZE);
 
 	/* YES! memcpy() works. FDATAn does not require 32-bit accesses. */
-	memcpy((void*)(ctx->mmio_base + SPIBAR_FDATA(0)), data, len);
+	memcpy((void *)(ctx->mmio_base + SPIBAR_FDATA(0)), data, len);
 }
 
 /* Drain FDATAn FIFO after a read transaction populates data. */
@@ -125,7 +125,7 @@ static void drain_xfer_fifo(struct spi_flash_ctx *ctx, void *dest, size_t len)
 	len = min(len, SPIBAR_FDATA_FIFO_SIZE);
 
 	/* YES! memcpy() works. FDATAn does not require 32-bit accesses. */
-	memcpy(dest, (void*)(ctx->mmio_base + SPIBAR_FDATA(0)), len);
+	memcpy(dest, (void *)(ctx->mmio_base + SPIBAR_FDATA(0)), len);
 }
 
 /* Fire up a transfer using the hardware sequencer. */
diff --git a/src/soc/intel/apollolake/gpio.c b/src/soc/intel/apollolake/gpio.c
index 4731d56f85..c373441d96 100644
--- a/src/soc/intel/apollolake/gpio.c
+++ b/src/soc/intel/apollolake/gpio.c
@@ -177,7 +177,7 @@ void gpio_configure_pads(const struct pad_config *cfg, size_t num_pads)
 		gpio_configure_pad(cfg + i);
 }
 
-void * gpio_dwx_address(const uint16_t pad)
+void *gpio_dwx_address(const uint16_t pad)
 {
 	/* Calculate Address of DW0 register for given GPIO
 	 * pad - GPIO number
diff --git a/src/soc/intel/apollolake/include/soc/gpio.h b/src/soc/intel/apollolake/include/soc/gpio.h
index 473044aa59..bdd39944d1 100644
--- a/src/soc/intel/apollolake/include/soc/gpio.h
+++ b/src/soc/intel/apollolake/include/soc/gpio.h
@@ -161,7 +161,7 @@ void gpio_configure_pad(const struct pad_config *cfg);
 void gpio_configure_pads(const struct pad_config *cfg, size_t num_pads);
 
 /* Calculate GPIO DW0 address */
-void * gpio_dwx_address(const uint16_t pad);
+void *gpio_dwx_address(const uint16_t pad);
 /*
  * Set the GPIO groups for the GPE blocks. The values from PMC register GPE_CFG
  * are passed which is then mapped to proper groups for MISCCFG. This basically
diff --git a/src/soc/intel/apollolake/include/soc/iosf.h b/src/soc/intel/apollolake/include/soc/iosf.h
index f82c967c49..99ed9fc8dc 100644
--- a/src/soc/intel/apollolake/include/soc/iosf.h
+++ b/src/soc/intel/apollolake/include/soc/iosf.h
@@ -24,7 +24,7 @@
 #define  RTC_CONFIG			0x3400
 #define   RTC_CONFIG_UCMOS_ENABLE	(1 << 2)
 
-static inline void * iosf_address(uint16_t port, uint16_t reg)
+static inline void *iosf_address(uint16_t port, uint16_t reg)
 {
 	uintptr_t addr = (CONFIG_IOSF_BASE_ADDRESS | (port << 16) | (reg & ~3));
 	return (void *)addr;