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-rw-r--r--src/soc/amd/sabrina/fsp_m_params.c4
-rw-r--r--src/soc/amd/sabrina/include/soc/platform_descriptors.h2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/sabrina/fsp_m_params.c b/src/soc/amd/sabrina/fsp_m_params.c
index 1a2f23bd51..70ebc7772a 100644
--- a/src/soc/amd/sabrina/fsp_m_params.c
+++ b/src/soc/amd/sabrina/fsp_m_params.c
@@ -16,7 +16,7 @@
#include <vendorcode/amd/fsp/sabrina/FspUsb.h>
#include "chip.h"
-__weak void mb_pre_fspm(void)
+__weak void mb_pre_fspm(FSP_M_CONFIG *mcfg)
{
}
@@ -156,5 +156,5 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
fsp_fill_pcie_ddi_descriptors(mcfg);
fsp_assign_ioapic_upds(mcfg);
- mb_pre_fspm();
+ mb_pre_fspm(mcfg);
}
diff --git a/src/soc/amd/sabrina/include/soc/platform_descriptors.h b/src/soc/amd/sabrina/include/soc/platform_descriptors.h
index c8e0fd0486..faa81e7555 100644
--- a/src/soc/amd/sabrina/include/soc/platform_descriptors.h
+++ b/src/soc/amd/sabrina/include/soc/platform_descriptors.h
@@ -14,6 +14,6 @@ void mainboard_get_dxio_ddi_descriptors(
const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num,
const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num);
-void mb_pre_fspm(void);
+void mb_pre_fspm(FSP_M_CONFIG *mcfg);
#endif /* AMD_SABRINA_PLATFORM_DESCRIPTORS_H */