2 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/itss.h b/src/soc/intel/common/block/include/intelblocks/itss.h
index 84ba7b443a..45a71cc901 100644
--- a/src/soc/intel/common/block/include/intelblocks/itss.h
+++ b/src/soc/intel/common/block/include/intelblocks/itss.h
@@ -23,6 +23,9 @@
 #define PCR_ITSS_PIRQG_ROUT	0x3106
 /* PIRQH Routing Control Register */
 #define PCR_ITSS_PIRQH_ROUT	0x3107
+/* ITSS Interrupt Route */
+#define PCR_ITSS_PIR	0x3140
+#define PCI_ITSS_PIR(i)	(PCR_ITSS_PIR + (i) * 2)
 /* ITSS Interrupt polarity control */
 #define PCR_ITSS_IPC0_CONF	0x3200
 /* ITSS Power reduction control */
@@ -30,6 +33,7 @@
 
 #if !defined(__ACPI__)
 
+#include <device/device.h>
 #include <southbridge/intel/common/acpi_pirq_gen.h>
 #include <stdint.h>
 
@@ -43,6 +47,12 @@ void itss_restore_irq_polarities(int start, int end);
 void itss_irq_init(const uint8_t pch_interrupt_routing[PIRQ_COUNT]);
 void itss_clock_gate_8254(void);
 
+/* SoC implementation to return corresponding PIR register offset. */
+uint32_t itss_soc_get_on_chip_dev_pir(struct device *dev);
+
+/* Return which PIRQx the device's INTx is connected to. */
+enum pirq itss_get_on_chip_dev_pirq(struct device *dev, enum pci_pin pin);
+
 #endif /* !defined(__ACPI__) */
 
 #endif /* SOC_INTEL_COMMON_BLOCK_ITSS_H */
diff --git a/src/soc/intel/common/block/itss/itss.c b/src/soc/intel/common/block/itss/itss.c
index 50e4c38790..4d9b7a59bb 100644
--- a/src/soc/intel/common/block/itss/itss.c
+++ b/src/soc/intel/common/block/itss/itss.c
@@ -134,3 +134,19 @@ void itss_restore_irq_polarities(int start, int end)
 
 	show_irq_polarities("After");
 }
+
+enum pirq itss_get_on_chip_dev_pirq(struct device *dev, enum pci_pin pin)
+{
+	/* Check if device is on chip. */
+	if (dev->upstream->dev->path.type != DEVICE_PATH_DOMAIN)
+		return PIRQ_INVALID;
+
+	uint16_t pir = pcr_read16(PID_ITSS, itss_soc_get_on_chip_dev_pir(dev));
+	if (pir < PCI_ITSS_PIR(0))
+		return PIRQ_INVALID;
+
+	/* The lower 3 bits of every 4 bits indicates which PIRQ is connect to INT. */
+	unsigned int pir_shift = (pin - PCI_INT_A) * 4;
+	unsigned int pir_mask = 0x07;
+	return ((pir >> pir_shift) & pir_mask) + PIRQ_A;
+}