4 files changed, 67 insertions, 1 deletions

diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h
index b3dddd4ed7..84a4e84a17 100644
--- a/src/soc/amd/stoneyridge/include/soc/gpio.h
+++ b/src/soc/amd/stoneyridge/include/soc/gpio.h
@@ -30,6 +30,14 @@
 #define GPIO_OUTPUT_MASK	(1 << GPIO_OUTPUT_SHIFT)
 #define GPIO_OUTPUT_ENABLE	(1 << 23)
 
+/*
+ * The definitions below should be used to make GPIO arrays compact and
+ * easy to understand.
+ */
+#define INPUT		0
+#define OUTPUT_H	(FCH_GPIO_OUTPUT_ENABLE | FCH_GPIO_OUTPUT_VALUE)
+#define OUTPUT_L	FCH_GPIO_OUTPUT_ENABLE
+
 /* GPIO_0 - GPIO_62 */
 #define GPIO_BANK0_CONTROL(gpio) \
 	(AMD_SB_ACPI_MMIO_ADDR + 0x1500 + ((gpio) * 4))
diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h
index 2d42ad9ad9..72a1e8c6f5 100644
--- a/src/soc/amd/stoneyridge/include/soc/iomap.h
+++ b/src/soc/amd/stoneyridge/include/soc/iomap.h
@@ -61,4 +61,8 @@
 #define AB_DATA				(AB_INDX+4)
 #define SYS_RESET			0xcf9
 
+/* GPIO control and mux access */
+#define AMD_GPIO_MUX			(AMD_SB_ACPI_MMIO_ADDR + 0x00000d00)
+#define AMD_GPIO_CONTROL		(AMD_SB_ACPI_MMIO_ADDR + 0x00001500)
+
 #endif /* __SOC_STONEYRIDGE_IOMAP_H__ */
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 7f1e210123..f77640e70d 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -24,6 +24,7 @@
 #include <device/pci_def.h>
 #include <soc/iomap.h>
 #include "chip.h"
+#include <rules.h>
 
 /* PSP at D8F0 */
 #define PSP_MAILBOX_BAR			PCI_BASE_ADDRESS_4 /* BKDG: "BAR3" */
@@ -265,7 +266,6 @@
 #define XHCI_PM_INDIRECT_INDEX		0x48
 #define XHCI_PM_INDIRECT_DATA		0x4C
 #define   XHCI_OVER_CURRENT_CONTROL	0x30
-
 #define EHCI_OVER_CURRENT_CONTROL	0x70
 
 #define USB_OC0				0
@@ -286,6 +286,20 @@
 
 #define WIDEIO_RANGE_ERROR		-1
 #define TOTAL_WIDEIO_PORTS		3
+#define AMD_GPIO_MUX_MASK		0x03
+
+#if ENV_BOOTBLOCK
+#define GPIO_TABLE_BOOTBLOCK		1
+#else
+#define GPIO_TABLE_BOOTBLOCK		0
+#endif
+#define STR_GPIO_STAGE			ENV_STRING
+
+struct soc_amd_stoneyridge_gpio {
+	uint8_t gpio;
+	uint8_t function;
+	uint8_t control;
+};
 
 void sb_enable_rom(void);
 void configure_stoneyridge_uart(void);
@@ -331,6 +345,20 @@ void xhci_pm_write32(uint8_t reg, uint32_t value);
 uint32_t xhci_pm_read32(uint8_t reg);
 void bootblock_fch_early_init(void);
 /**
+ * @brief get table and table size to program GPIO
+ *
+ * @param size = pointer to variable where to return table size
+ *
+ * @return pointer to the desired table
+ */
+const struct soc_amd_stoneyridge_gpio *board_get_gpio(size_t *size);
+/**
+ * @brief program a particular set of GPIO
+ *
+ * @return none
+ */
+void sb_program_gpio(void);
+/**
  * @brief Find the size of a particular wide IO
  *
  * @param index = index of desired wide IO
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 0af774bbf6..46906d09ab 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -155,6 +155,32 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size)
 	return irq_association;
 }
 
+void sb_program_gpio(void)
+{
+	void *tmp_ptr;
+	const struct soc_amd_stoneyridge_gpio *gpio_ptr;
+	size_t size;
+	uint8_t control, mux, index;
+
+	printk(BIOS_SPEW, "GPIO programming stage %s\n", STR_GPIO_STAGE);
+	gpio_ptr = board_get_gpio(&size);
+	for (index = 0; index < size; index++) {
+		mux = gpio_ptr[index].function;
+		control = gpio_ptr[index].control;
+		tmp_ptr = (void *)(gpio_ptr[index].gpio + AMD_GPIO_MUX);
+		write8(tmp_ptr, mux & AMD_GPIO_MUX_MASK);
+
+		/*
+		 * Get the address of AMD_GPIO_CONTROL (dword) relative
+		 * to the desired pin and program bits 16-23.
+		 */
+		tmp_ptr = (void *)(gpio_ptr[index].gpio * sizeof(uint32_t) +
+					AMD_GPIO_CONTROL + 2);
+		write8(tmp_ptr, control);
+	}
+	printk(BIOS_SPEW, "End GPIO programming\n");
+}
+
 /**
  * @brief Find the size of a particular wide IO
  *