8 files changed, 10 insertions, 10 deletions
diff --git a/src/soc/broadcom/cygnus/ns16550.c b/src/soc/broadcom/cygnus/ns16550.c
index aa9dd2d818..e7008274f6 100644
--- a/src/soc/broadcom/cygnus/ns16550.c
+++ b/src/soc/broadcom/cygnus/ns16550.c
@@ -120,7 +120,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = (uintptr_t)regs;
-	serial.baud = default_baudrate();
+	serial.baud = CONFIG_TTYS0_BAUD;
 	serial.regwidth = 4;
 	lb_add_serial(&serial, data);
 
diff --git a/src/soc/imgtec/pistachio/uart.c b/src/soc/imgtec/pistachio/uart.c
index 1f39e8b7e7..df1a5ace04 100644
--- a/src/soc/imgtec/pistachio/uart.c
+++ b/src/soc/imgtec/pistachio/uart.c
@@ -150,7 +150,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
-	serial.baud = default_baudrate();
+	serial.baud = CONFIG_TTYS0_BAUD;
 	serial.regwidth = 1 << UART_SHIFT;
 	lb_add_serial(&serial, data);
 
diff --git a/src/soc/mediatek/mt8173/uart.c b/src/soc/mediatek/mt8173/uart.c
index d0b140d14d..36a279fa65 100644
--- a/src/soc/mediatek/mt8173/uart.c
+++ b/src/soc/mediatek/mt8173/uart.c
@@ -177,7 +177,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = UART0_BASE;
-	serial.baud = default_baudrate();
+	serial.baud = CONFIG_TTYS0_BAUD;
 	serial.regwidth = 4;
 	lb_add_serial(&serial, data);
 
diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c
index 76ea4261a0..0d5233788d 100644
--- a/src/soc/nvidia/tegra124/uart.c
+++ b/src/soc/nvidia/tegra124/uart.c
@@ -136,7 +136,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
-	serial.baud = default_baudrate();
+	serial.baud = CONFIG_TTYS0_BAUD;
 	serial.regwidth = 4;
 	lb_add_serial(&serial, data);
 
diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c
index 608b443dea..1c52687491 100644
--- a/src/soc/nvidia/tegra210/uart.c
+++ b/src/soc/nvidia/tegra210/uart.c
@@ -123,7 +123,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = CONFIG_CONSOLE_SERIAL_TEGRA210_UART_ADDRESS;
-	serial.baud = default_baudrate();
+	serial.baud = CONFIG_TTYS0_BAUD;
 	serial.regwidth = 4;
 	lb_add_serial(&serial, data);
 
diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c
index 2ea390b933..671a6d1281 100644
--- a/src/soc/qualcomm/ipq40xx/uart.c
+++ b/src/soc/qualcomm/ipq40xx/uart.c
@@ -297,7 +297,7 @@ void uart_fill_lb(void *data)
 
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = (uint32_t)UART1_DM_BASE;
-	serial.baud = default_baudrate();
+	serial.baud = CONFIG_TTYS0_BAUD;
 	serial.regwidth = 1;
 
 	lb_add_serial(&serial, data);
diff --git a/src/soc/samsung/exynos5250/uart.c b/src/soc/samsung/exynos5250/uart.c
index 07f1e34cce..7ad6cbe6d9 100644
--- a/src/soc/samsung/exynos5250/uart.c
+++ b/src/soc/samsung/exynos5250/uart.c
@@ -61,7 +61,7 @@ static void serial_setbrg_dev(struct s5p_uart *uart)
 
 	// All UARTs share the same clock.
 	uclk = clock_get_periph_rate(PERIPH_ID_UART3);
-	val = uclk / default_baudrate();
+	val = uclk / CONFIG_TTYS0_BAUD;
 
 	write32(&uart->ubrdiv, val / 16 - 1);
 
@@ -191,7 +191,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
-	serial.baud = default_baudrate();
+	serial.baud = CONFIG_TTYS0_BAUD;
 	serial.regwidth = 4;
 	lb_add_serial(&serial, data);
 
diff --git a/src/soc/samsung/exynos5420/uart.c b/src/soc/samsung/exynos5420/uart.c
index 6f54c003ba..a38be07d13 100644
--- a/src/soc/samsung/exynos5420/uart.c
+++ b/src/soc/samsung/exynos5420/uart.c
@@ -61,7 +61,7 @@ static void serial_setbrg_dev(struct s5p_uart *uart)
 
 	// All UARTs share the same clock.
 	uclk = clock_get_periph_rate(PERIPH_ID_UART3);
-	val = uclk / default_baudrate();
+	val = uclk / CONFIG_TTYS0_BAUD;
 
 	write32(&uart->ubrdiv, val / 16 - 1);
 
@@ -182,7 +182,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
-	serial.baud = default_baudrate();
+	serial.baud = CONFIG_TTYS0_BAUD;
 	serial.regwidth = 4;
 	serial.input_hertz = uart_platform_refclk();
 	serial.uart_pci_addr = 0;