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-rw-r--r--src/soc/intel/baytrail/baytrail/iomap.h1
-rw-r--r--src/soc/intel/baytrail/baytrail/lpc.h1
-rw-r--r--src/soc/intel/baytrail/romstage/romstage.c2
3 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/baytrail/iomap.h b/src/soc/intel/baytrail/baytrail/iomap.h
index ea2d648e36..9fc8da7945 100644
--- a/src/soc/intel/baytrail/baytrail/iomap.h
+++ b/src/soc/intel/baytrail/baytrail/iomap.h
@@ -28,6 +28,7 @@
#define ILB_BASE_ADDRESS 0xfed08000
#define SPI_BASE_ADDRESS 0xfed01000
#define MPHY_BASE_ADDRESS 0xfef00000
+#define PUNIT_BASE_ADDRESS 0xfed05000
#define RCBA_BASE_ADDRESS 0xfed1c000
/* IO Port base */
diff --git a/src/soc/intel/baytrail/baytrail/lpc.h b/src/soc/intel/baytrail/baytrail/lpc.h
index 05220e452d..71391ade3f 100644
--- a/src/soc/intel/baytrail/baytrail/lpc.h
+++ b/src/soc/intel/baytrail/baytrail/lpc.h
@@ -29,6 +29,7 @@
#define IBASE 0x50
#define SBASE 0x54
#define MPBASE 0x58
+#define PUBASE 0x5c
#define UART_CONT 0x80
#define RCBA 0xf0
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index 8a65f06857..f62aeac23f 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -74,6 +74,8 @@ static void program_base_addresses(void)
pci_write_config32(lpc_dev, SBASE, reg);
reg = MPHY_BASE_ADDRESS | 2;
pci_write_config32(lpc_dev, MPBASE, reg);
+ reg = PUNIT_BASE_ADDRESS | 2;
+ pci_write_config32(lpc_dev, PUBASE, reg);
reg = RCBA_BASE_ADDRESS | 1;
pci_write_config32(lpc_dev, RCBA, reg);