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-rw-r--r--src/soc/intel/baytrail/spi.c9
-rw-r--r--src/soc/intel/braswell/spi.c9
-rw-r--r--src/soc/intel/broadwell/spi.c9
-rw-r--r--src/soc/intel/fsp_baytrail/spi.c9
-rw-r--r--src/soc/intel/skylake/acpi.c36
5 files changed, 35 insertions, 37 deletions
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index d5b962ffe7..26b717c65e 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -248,6 +248,8 @@ static ich9_spi_regs *spi_regs(void)
return (void *)sbase;
}
+#define MENU_BYTES member_size(struct ich9_spi_regs, opmenu)
+
void spi_init(void)
{
ich9_spi_regs *ich9_spi = spi_regs();
@@ -332,7 +334,7 @@ static void spi_setup_type(spi_transaction *trans)
static int spi_setup_opcode(spi_transaction *trans)
{
uint16_t optypes;
- uint8_t opmenu[cntlr.menubytes];
+ uint8_t opmenu[MENU_BYTES];
trans->opcode = trans->out[0];
spi_use_out(trans, 1);
@@ -353,13 +355,12 @@ static int spi_setup_opcode(spi_transaction *trans)
return 0;
read_reg(cntlr.opmenu, opmenu, sizeof(opmenu));
- for (opcode_index = 0; opcode_index < cntlr.menubytes;
- opcode_index++) {
+ for (opcode_index = 0; opcode_index < ARRAY_SIZE(opmenu); opcode_index++) {
if (opmenu[opcode_index] == trans->opcode)
break;
}
- if (opcode_index == cntlr.menubytes) {
+ if (opcode_index == ARRAY_SIZE(opmenu)) {
printk(BIOS_DEBUG, "ICH SPI: Opcode %x not found\n",
trans->opcode);
return -1;
diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c
index b968283fe7..00ec48f978 100644
--- a/src/soc/intel/braswell/spi.c
+++ b/src/soc/intel/braswell/spi.c
@@ -221,6 +221,8 @@ static ich9_spi_regs *spi_regs(void)
return (void *)sbase;
}
+#define MENU_BYTES member_size(struct ich9_spi_regs, opmenu)
+
void spi_init(void)
{
ich9_spi_regs *ich9_spi;
@@ -310,7 +312,7 @@ static void spi_setup_type(spi_transaction *trans)
static int spi_setup_opcode(spi_transaction *trans)
{
uint16_t optypes;
- uint8_t opmenu[cntlr.menubytes];
+ uint8_t opmenu[MENU_BYTES];
trans->opcode = trans->out[0];
spi_use_out(trans, 1);
@@ -332,13 +334,12 @@ static int spi_setup_opcode(spi_transaction *trans)
return 0;
read_reg(cntlr.opmenu, opmenu, sizeof(opmenu));
- for (opcode_index = 0; opcode_index < cntlr.menubytes;
- opcode_index++) {
+ for (opcode_index = 0; opcode_index < ARRAY_SIZE(opmenu); opcode_index++) {
if (opmenu[opcode_index] == trans->opcode)
break;
}
- if (opcode_index == cntlr.menubytes) {
+ if (opcode_index == ARRAY_SIZE(opmenu)) {
printk(BIOS_DEBUG, "ICH SPI: Opcode %x not found\n",
trans->opcode);
return -1;
diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c
index 01d2830481..ac893ea33d 100644
--- a/src/soc/intel/broadwell/spi.c
+++ b/src/soc/intel/broadwell/spi.c
@@ -231,6 +231,8 @@ static void ich_set_bbar(uint32_t minaddr)
writel_(ichspi_bbar, cntlr.bbar);
}
+#define MENU_BYTES member_size(struct ich9_spi_regs, opmenu)
+
void spi_init(void)
{
uint8_t *rcrb; /* Root Complex Register Block */
@@ -332,7 +334,7 @@ static void spi_setup_type(spi_transaction *trans)
static int spi_setup_opcode(spi_transaction *trans)
{
uint16_t optypes;
- uint8_t opmenu[cntlr.menubytes];
+ uint8_t opmenu[MENU_BYTES];
trans->opcode = trans->out[0];
spi_use_out(trans, 1);
@@ -354,13 +356,12 @@ static int spi_setup_opcode(spi_transaction *trans)
return 0;
read_reg(cntlr.opmenu, opmenu, sizeof(opmenu));
- for (opcode_index = 0; opcode_index < cntlr.menubytes;
- opcode_index++) {
+ for (opcode_index = 0; opcode_index < ARRAY_SIZE(opmenu); opcode_index++) {
if (opmenu[opcode_index] == trans->opcode)
break;
}
- if (opcode_index == cntlr.menubytes) {
+ if (opcode_index == ARRAY_SIZE(opmenu)) {
printk(BIOS_DEBUG, "ICH SPI: Opcode %x not found\n",
trans->opcode);
return -1;
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index 9375d19547..0b52ea9611 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -237,6 +237,8 @@ static ich9_spi_regs *spi_regs(void)
return (void *)sbase;
}
+#define MENU_BYTES member_size(struct ich9_spi_regs, opmenu)
+
void spi_init(void)
{
ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr);
@@ -314,7 +316,7 @@ static int spi_setup_opcode(spi_transaction *trans)
{
ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr);
uint16_t optypes;
- uint8_t opmenu[cntlr->menubytes];
+ uint8_t opmenu[MENU_BYTES];
trans->opcode = trans->out[0];
spi_use_out(trans, 1);
@@ -335,13 +337,12 @@ static int spi_setup_opcode(spi_transaction *trans)
return 0;
read_reg(cntlr->opmenu, opmenu, sizeof(opmenu));
- for (opcode_index = 0; opcode_index < cntlr->menubytes;
- opcode_index++) {
+ for (opcode_index = 0; opcode_index < ARRAY_SIZE(opmenu); opcode_index++) {
if (opmenu[opcode_index] == trans->opcode)
break;
}
- if (opcode_index == cntlr->menubytes) {
+ if (opcode_index == ARRAY_SIZE(opmenu)) {
printk(BIOS_DEBUG, "ICH SPI: Opcode %x not found\n",
trans->opcode);
return -1;
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 869ca7f1ee..aa51cbe7a5 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -350,25 +350,26 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->x_gpe1_blk.addrh = 0x0;
}
-static void generate_c_state_entries(int s0ix_enable, int max_cstate)
+static void write_c_state_entries(acpi_cstate_t *map, const int *set, size_t max_c_state)
{
-
- acpi_cstate_t map[max_cstate];
- int *set;
- int i;
-
- if (s0ix_enable)
- set = cstate_set_s0ix;
- else
- set = cstate_set_non_s0ix;
-
- for (i = 0; i < max_cstate; i++) {
+ for (size_t i = 0; i < max_c_state; i++) {
memcpy(&map[i], &cstate_map[set[i]], sizeof(acpi_cstate_t));
map[i].ctype = i + 1;
}
/* Generate C-state tables */
- acpigen_write_CST_package(map, ARRAY_SIZE(map));
+ acpigen_write_CST_package(map, max_c_state);
+}
+
+static void generate_c_state_entries(int s0ix_enable)
+{
+ if (s0ix_enable) {
+ acpi_cstate_t map[ARRAY_SIZE(cstate_set_s0ix)];
+ write_c_state_entries(map, cstate_set_s0ix, ARRAY_SIZE(map));
+ } else {
+ acpi_cstate_t map[ARRAY_SIZE(cstate_set_non_s0ix)];
+ write_c_state_entries(map, cstate_set_non_s0ix, ARRAY_SIZE(map));
+ }
}
static int calculate_power(int tdp, int p1_ratio, int ratio)
@@ -506,12 +507,6 @@ void generate_cpu_entries(struct device *device)
int numcpus = totalcores/cores_per_package;
config_t *config = config_of_path(SA_DEVFN_ROOT);
int is_s0ix_enable = config->s0ix_enable;
- int max_c_state;
-
- if (is_s0ix_enable)
- max_c_state = ARRAY_SIZE(cstate_set_s0ix);
- else
- max_c_state = ARRAY_SIZE(cstate_set_non_s0ix);
printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n",
numcpus, cores_per_package);
@@ -534,8 +529,7 @@ void generate_cpu_entries(struct device *device)
cpu_id*cores_per_package+core_id,
pcontrol_blk, plen);
/* Generate C-state tables */
- generate_c_state_entries(is_s0ix_enable,
- max_c_state);
+ generate_c_state_entries(is_s0ix_enable);
if (config->eist_enable) {
/* Generate P-state tables */
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-16 05:30:19 +0000