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-rw-r--r--src/soc/rockchip/rk3288/clock.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c
index 59a32db5b2..8202ef2127 100644
--- a/src/soc/rockchip/rk3288/clock.c
+++ b/src/soc/rockchip/rk3288/clock.c
@@ -159,7 +159,6 @@ static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 2, 4);
*/
#define PERI_ACLK_DIV_SHIFT (0x0)
#define PERI_ACLK_DIV_MSK (0x1F)
-#define PERI_ACLK_DIV_SHIFT (0)
/*******************CLKSEL37 BITS***************************/
#define L2_DIV_MSK (0x7)