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-rw-r--r--src/soc/intel/braswell/lpe.c29
1 files changed, 26 insertions, 3 deletions
diff --git a/src/soc/intel/braswell/lpe.c b/src/soc/intel/braswell/lpe.c
index 8ec944bed5..436099b4d6 100644
--- a/src/soc/intel/braswell/lpe.c
+++ b/src/soc/intel/braswell/lpe.c
@@ -77,8 +77,7 @@ static void lpe_enable_acpi_mode(device_t dev)
/* Save BAR0, BAR1, and firmware base to ACPI NVS */
assign_device_nvs(dev, &gnvs->dev.lpe_bar0, PCI_BASE_ADDRESS_0);
- /* LPE seems does not have BAR at PCI_BASE_ADDRESS_1 so disable it. */
- /* assign_device_nvs(dev, &gnvs->dev.lpe_bar1, PCI_BASE_ADDRESS_1); */
+ assign_device_nvs(dev, &gnvs->dev.lpe_bar1, PCI_BASE_ADDRESS_2);
assign_device_nvs(dev, &gnvs->dev.lpe_fw, FIRMWARE_PCI_REG_BASE);
/* Device is enabled in ACPI mode */
@@ -165,16 +164,40 @@ static void lpe_init(device_t dev)
static void lpe_read_resources(device_t dev)
{
+ struct resource *res;
pci_dev_read_resources(dev);
+ /*
+ * Allocate the BAR1 resource at index 2 to fulfil the Windows driver
+ * interface requirements even though the PCI device has only one BAR
+ */
+ res = new_resource(dev, PCI_BASE_ADDRESS_2);
+ res->base = 0;
+ res->size = 0x1000;
+ res->limit = 0xffffffff;
+ res->gran = 12;
+ res->align = 12;
+ res->flags = IORESOURCE_MEM;
+
reserved_ram_resource(dev, FIRMWARE_PCI_REG_BASE,
FIRMWARE_PHYS_BASE >> 10,
FIRMWARE_PHYS_LENGTH >> 10);
}
+static void lpe_set_resources(device_t dev)
+{
+ struct resource *res;
+
+ res = find_resource(dev, PCI_BASE_ADDRESS_2);
+ if (res != NULL)
+ res->flags |= IORESOURCE_STORED;
+
+ pci_dev_set_resources(dev);
+}
+
static const struct device_operations device_ops = {
.read_resources = lpe_read_resources,
- .set_resources = pci_dev_set_resources,
+ .set_resources = lpe_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpe_init,
.enable = NULL,