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-rw-r--r--src/soc/marvell/mvmap2315/Kconfig52
-rw-r--r--src/soc/marvell/mvmap2315/Makefile.inc51
-rw-r--r--src/soc/marvell/mvmap2315/bootblock.c46
-rw-r--r--src/soc/marvell/mvmap2315/cbmem.c29
-rw-r--r--src/soc/marvell/mvmap2315/clock.c33
-rw-r--r--src/soc/marvell/mvmap2315/fiq.S36
-rw-r--r--src/soc/marvell/mvmap2315/gic.c28
-rw-r--r--src/soc/marvell/mvmap2315/include/soc/addressmap.h41
-rw-r--r--src/soc/marvell/mvmap2315/include/soc/clock.h359
-rw-r--r--src/soc/marvell/mvmap2315/include/soc/gic.h413
-rw-r--r--src/soc/marvell/mvmap2315/include/soc/memlayout.ld55
-rw-r--r--src/soc/marvell/mvmap2315/include/soc/mmu_operations.h28
-rw-r--r--src/soc/marvell/mvmap2315/include/soc/pinmux.h86
-rw-r--r--src/soc/marvell/mvmap2315/include/soc/reset.h22
-rw-r--r--src/soc/marvell/mvmap2315/include/soc/sdram.h22
-rw-r--r--src/soc/marvell/mvmap2315/include/soc/timer.h49
-rw-r--r--src/soc/marvell/mvmap2315/include/soc/uart.h23
-rw-r--r--src/soc/marvell/mvmap2315/media.c30
-rw-r--r--src/soc/marvell/mvmap2315/mmu_operations.c52
-rw-r--r--src/soc/marvell/mvmap2315/pinmux.c64
-rw-r--r--src/soc/marvell/mvmap2315/ramstage_entry.S29
-rw-r--r--src/soc/marvell/mvmap2315/reset.c28
-rw-r--r--src/soc/marvell/mvmap2315/romstage.c40
-rw-r--r--src/soc/marvell/mvmap2315/romstage_entry.S23
-rw-r--r--src/soc/marvell/mvmap2315/sdram.c25
-rw-r--r--src/soc/marvell/mvmap2315/soc.c41
-rw-r--r--src/soc/marvell/mvmap2315/timer.c63
-rw-r--r--src/soc/marvell/mvmap2315/uart.c49
28 files changed, 1817 insertions, 0 deletions
diff --git a/src/soc/marvell/mvmap2315/Kconfig b/src/soc/marvell/mvmap2315/Kconfig
new file mode 100644
index 0000000000..d27f4c4fda
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/Kconfig
@@ -0,0 +1,52 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Marvell, Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+config SOC_MARVELL_MVMAP2315
+ bool
+ default n
+ select ARCH_BOOTBLOCK_ARMV7_R
+ select ARCH_RAMSTAGE_ARMV8_64
+ select ARCH_ROMSTAGE_ARMV8_64
+ select ARCH_VERSTAGE_ARMV8_64
+ select BOOTBLOCK_CONSOLE
+ select COLLECT_TIMESTAMPS
+ select DRIVERS_UART_8250MEM_32
+ select HAVE_HARD_RESET
+ select HAVE_MONOTONIC_TIMER
+ select GENERIC_UDELAY
+ select UNCOMPRESSED_RAMSTAGE
+ select UART_OVERRIDE_REFCLK
+
+if SOC_MARVELL_MVMAP2315
+
+config CHROMEOS
+ select VBOOT
+ select VBOOT_DYNAMIC_WORK_BUFFER
+ select VBOOT_STARTS_IN_ROMSTAGE
+
+config CONSOLE_SERIAL_MVMAP2315_UART_ADDRESS
+ hex
+ depends on CONSOLE_SERIAL
+ default 0xE1060000
+ help
+ Map the UART to the respective MMIO address
+
+config TTYS0_BAUD
+ int
+ depends on CONSOLE_SERIAL
+ default 9600
+ help
+ Baud rate for the UART
+endif
diff --git a/src/soc/marvell/mvmap2315/Makefile.inc b/src/soc/marvell/mvmap2315/Makefile.inc
new file mode 100644
index 0000000000..34a47fb650
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/Makefile.inc
@@ -0,0 +1,51 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Marvell, Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+ifeq ($(CONFIG_SOC_MARVELL_MVMAP2315),y)
+
+bootblock-y += bootblock.c
+bootblock-y += clock.c
+bootblock-y += fiq.S
+bootblock-y += gic.c
+bootblock-y += media.c
+bootblock-y += pinmux.c
+bootblock-y += reset.c
+bootblock-y += timer.c
+bootblock-y += sdram.c
+bootblock-y += uart.c
+
+ramstage-y += cbmem.c
+ramstage-y += media.c
+ramstage-y += ramstage_entry.S
+ramstage-y += reset.c
+ramstage-y += soc.c
+ramstage-y += timer.c
+ramstage-y += sdram.c
+ramstage-y += uart.c
+
+romstage-y += cbmem.c
+romstage-y += clock.c
+romstage-y += media.c
+romstage-y += mmu_operations.c
+romstage-y += reset.c
+romstage-y += romstage_entry.S
+romstage-y += romstage.c
+romstage-y += sdram.c
+romstage-y += timer.c
+romstage-y += uart.c
+
+CPPFLAGS_common += -Isrc/soc/marvell/mvmap2315/include/
+
+endif
diff --git a/src/soc/marvell/mvmap2315/bootblock.c b/src/soc/marvell/mvmap2315/bootblock.c
new file mode 100644
index 0000000000..5aa9eb547b
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/bootblock.c
@@ -0,0 +1,46 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <bootblock_common.h>
+#include <console/console.h>
+#include <timestamp.h>
+#include <console/uart.h>
+#include <soc/gic.h>
+#include <soc/uart.h>
+
+void bootblock_soc_early_init(void)
+{
+ timestamp_add_now(TS_START_BOOTBLOCK);
+
+ asm volatile ("bl fiq_stack_init" : : : "r0", "r1");
+
+ enable_bcm_gic();
+
+ uart_num = 0;
+}
+
+void bootblock_soc_init(void)
+{
+ /* initializing UART1 to free UART0 to be used by romstage */
+ uart_num = 1;
+ uart_init(uart_num);
+
+ while (1)
+ ;
+}
diff --git a/src/soc/marvell/mvmap2315/cbmem.c b/src/soc/marvell/mvmap2315/cbmem.c
new file mode 100644
index 0000000000..8735526945
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/cbmem.c
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <cbmem.h>
+#include <soc/addressmap.h>
+#include <soc/sdram.h>
+#include <symbols.h>
+
+void *cbmem_top(void)
+{
+ return (void *)min((uintptr_t)_dram + sdram_size_mb() * MiB,
+ MAX_DRAM_ADDRESS);
+}
diff --git a/src/soc/marvell/mvmap2315/clock.c b/src/soc/marvell/mvmap2315/clock.c
new file mode 100644
index 0000000000..ef0c3c5b77
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/clock.c
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/clock.h>
+#include <arch/io.h>
+#include <soc/clock.h>
+
+void clock_init(void)
+{
+ u32 freq = MVMAP2315_CLK_M_KHZ * 1000;
+
+ set_cntfrq(freq);
+
+ write32(&mvmap2315_gentimer->cntfid0, freq);
+
+ setbits_le32(&mvmap2315_gentimer->cntcr, MVMAP2315_GENTIMER_EN);
+}
diff --git a/src/soc/marvell/mvmap2315/fiq.S b/src/soc/marvell/mvmap2315/fiq.S
new file mode 100644
index 0000000000..5d8e23468b
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/fiq.S
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/asm.h>
+
+ENTRY(fiq_stack_init)
+
+ mrs r0, CPSR
+ mov r1, r0
+ bic r1, r1, #0x40
+ orr r0, r0, #0x51
+ and r0, r0, #0xFFFFFFF1
+ msr CPSR_c, r0
+ ldr sp, =_efiq_stack
+ orr r0, r0, #0x10
+ and r0, r0, #0xFFFFFFB0
+ msr CPSR_cf, r1
+
+ dsb
+ isb
+
+ bx lr
+
+ENDPROC(fiq_stack_init)
diff --git a/src/soc/marvell/mvmap2315/gic.c b/src/soc/marvell/mvmap2315/gic.c
new file mode 100644
index 0000000000..e11e429cc1
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/gic.c
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/io.h>
+#include <soc/gic.h>
+
+void enable_bcm_gic(void)
+{
+ setbits_le32(&mvmap2315_bcm_gicc->ctrl, MVMAP2315_BCM_GICC_EN0);
+ setbits_le32(&mvmap2315_bcm_gicc->ctrl, MVMAP2315_BCM_GICD_FIQ_EN);
+ setbits_le32(&mvmap2315_bcm_gicd->ctrl, MVMAP2315_BCM_GICD_EN0);
+}
diff --git a/src/soc/marvell/mvmap2315/include/soc/addressmap.h b/src/soc/marvell/mvmap2315/include/soc/addressmap.h
new file mode 100644
index 0000000000..53e627bffe
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/addressmap.h
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_ADDRESS_MAP_H__
+#define __SOC_MARVELL_MVMAP2315_ADDRESS_MAP_H__
+
+#include <stdint.h>
+
+#define MAX_DRAM_ADDRESS 0x73000000
+
+#define MVMAP2315_CBFS_BASE 0x00400000
+
+#define MVMAP2315_PINMUX_BASE 0xE0140000
+#define MVMAP2315_TIMER0_BASE 0xE1020000
+
+#define MVMAP2315_BCM_GICD_BASE 0xE0111000
+#define MVMAP2315_BCM_GICC_BASE 0xE0112000
+
+#define MVMAP2315_MAIN_PLL_BASE 0xE0125000
+#define MVMAP2315_APMU_CLK_BASE 0xE0125400
+#define MVMAP2315_GENTIMER_BASE 0xE0137000
+#define MVMAP2315_MPMU_CLK_BASE 0xEF000800
+
+#define MVMAP2315_RAM_BASE 0x00000000
+#define MVMAP2315_DEVICE_BASE 0x80000000
+#define MVMAP2315_FLASH_BASE 0xFE000000
+#define MVMAP2315_LCM_BASE 0xE0000000
+
+#endif /* __SOC_MARVELL_MVMAP2315_ADDRESS_MAP_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/clock.h b/src/soc/marvell/mvmap2315/include/soc/clock.h
new file mode 100644
index 0000000000..3e06b28447
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/clock.h
@@ -0,0 +1,359 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software;
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation;
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY;
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_CLOCK_H__
+#define __SOC_MARVELL_MVMAP2315_CLOCK_H__
+
+#include <stdint.h>
+
+#include <soc/addressmap.h>
+#include <types.h>
+
+#define MVMAP2315_CLK_M_KHZ 25000
+#define MVMAP2315_GENTIMER_EN BIT(0)
+
+struct mvmap2315_gentimer_regs {
+ u32 cntcr;
+ u32 cntsr;
+ u32 cntcvl;
+ u32 cntcvu;
+ u8 _reserved0[0x10];
+ u32 cntfid0;
+ u8 _reserved1[0xfac];
+ u32 pidr4;
+ u8 _reserved2[0x0c];
+ u32 pidr0;
+ u32 pidr1;
+ u32 pidr2;
+ u32 pidr3;
+ u32 cidr0;
+ u32 cidr1;
+ u32 cidr2;
+ u32 cidr3;
+};
+
+check_member(mvmap2315_gentimer_regs, cidr3, 0xFFC);
+static struct mvmap2315_gentimer_regs * const mvmap2315_gentimer
+ = (void *)MVMAP2315_GENTIMER_BASE;
+
+#define MVMAP2315_PLL_LOCK BIT(0)
+#define MVMAP2315_PLL_BYPASS_EN BIT(16)
+
+struct mvmap2315_main_pll_regs {
+ u32 rst_prediv;
+ u32 mult_postdiv;
+ u32 kvco;
+ u32 misc;
+ u32 feedback_mode_deskew;
+ u32 offset_mode;
+ u32 fixed_mode_ssc_mode;
+ u32 ssc_freq_ssc_range;
+ u32 clk_ctrl_marvell_test;
+ u32 lock_status;
+ u32 reserve_out;
+};
+
+check_member(mvmap2315_main_pll_regs, reserve_out, 0x28);
+static struct mvmap2315_main_pll_regs * const mvmap2315_pll
+ = (void *)MVMAP2315_MAIN_PLL_BASE;
+
+#define MVMAP2315_UART_CLK_EN BIT(1)
+#define MVMAP2315_SDMMC_CLK_RSTN BIT(0)
+#define MVMAP2315_APMU_CLK_EN BIT(1)
+#define MVMAP2315_APMU_CLK_RSTN BIT(0)
+struct mvmap2315_apmu_clk_regs {
+ u32 uartfracdivcfg0;
+ u8 _reserved0[0x0c];
+ u32 uartfracdivcfg1;
+ u8 _reserved1[0x0c];
+ u32 r4clkstatus;
+ u8 _reserved2[0x5c];
+ u32 busclk2x_a2_clkgenconfig;
+ u32 busclk2x_a2_clkgenstatus;
+ u8 _reserved3[0x08];
+ u32 busclk_mcix2_clkgenconfig;
+ u32 busclk_mcix2_clkgenstatus;
+ u32 busclk_mcix2_phyreset_clkgenconfig;
+ u32 busclk_mcix2_phyreset_clkgenstatus;
+ u32 busclk_mcix10_clkgenconfig;
+ u32 busclk_mcix10_clkgenstatus;
+ u32 busclk_mcix1_phyreset0_clkgenconfig;
+ u32 busclk_mcix1_phyreset0_clkgenstatus;
+ u32 busclk_mcix11_clkgenconfig;
+ u32 busclk_mcix11_clkgenstatus;
+ u32 busclk_mcix1_phyreset1_clkgenconfig;
+ u32 busclk_mcix1_phyreset1_clkgenstatus;
+ u32 busclk_mcix12_clkgenconfig;
+ u32 busclk_mcix12_clkgenstatus;
+ u32 busclk_mcix1_phyreset2_clkgenconfig;
+ u32 busclk_mcix1_phyreset2_clkgenstatus;
+ u32 busclk_mcix13_clkgenconfig;
+ u32 busclk_mcix13_clkgenstatus;
+ u32 busclk_mcix1_phyreset3_clkgenconfig;
+ u32 busclk_mcix1_phyreset3_clkgenstatus;
+ u8 _reserved4[0x10];
+ u32 busclk_aes_clkgenconfig;
+ u32 busclk_aes_clkgenstatus;
+ u32 busclk_apaonbus_hs_clkgenconfig;
+ u32 busclk_apaonbus_hs_clkgenstatus;
+ u32 busclk_a2_clkgenconfig;
+ u32 busclk_a2_clkgenstatus;
+ u8 _reserved5[0x78];
+ u32 apaonclk_clkgenconfig;
+ u32 apaonclk_clkgenstatus;
+ u32 apaonclk_apmucpu_clkgenconfig;
+ u32 apaonclk_apmucpu_clkgenstatus;
+ u32 apaonclk_sdmmc_clkgenconfig;
+ u32 apaonclk_sdmmc_clkgenstatus;
+ u8 _reserved6[0x08];
+ u32 apaonclk_m2m_clkgenconfig;
+ u32 apaonclk_m2m_clkgenstatus;
+ u32 apaonclk_apb_clkgenconfig;
+ u32 apaonclk_apb_clkgenstatus;
+ u8 _reserved7[0x50];
+ u32 bistclk_clkgenconfig;
+ u32 bistclk_clkgenstatus;
+ u32 bistclk_a2reset_clkgenconfig;
+ u32 bistclk_a2reset_clkgenstatus;
+ u32 bistclk_apcpureset_clkgenconfig;
+ u32 bistclk_apcpureset_clkgenstatus;
+ u32 bistclk_coresightreset_clkgenconfig;
+ u32 bistclk_coresightreset_clkgenstatus;
+ u32 bistclk_mcflcreset_clkgenconfig;
+ u32 bistclk_mcflcreset_clkgenstatus;
+ u8 _reserved8[0x08];
+ u32 bistclk_gpu3dreset_clkgenconfig;
+ u32 bistclk_gpu3dreset_clkgenstatus;
+ u32 bistclk_gpu3dcorereset0_clkgenconfig;
+ u32 bistclk_gpu3dcorereset0_clkgenstatus;
+ u32 bistclk_gpu3dcorereset1_clkgenconfig;
+ u32 bistclk_gpu3dcorereset1_clkgenstatus;
+ u32 bistclk_gpu3dcorereset2_clkgenconfig;
+ u32 bistclk_gpu3dcorereset2_clkgenstatus;
+ u32 bistclk_gpu3dcorereset3_clkgenconfig;
+ u32 bistclk_gpu3dcorereset3_clkgenstatus;
+ u32 bistclk_gpu2dreset_clkgenconfig;
+ u32 bistclk_gpu2dreset_clkgenstatus;
+ u32 bistclk_zramreset_clkgenconfig;
+ u32 bistclk_zramreset_clkgenstatus;
+ u32 bistclk_vpuencreset_clkgenconfig;
+ u32 bistclk_vpuencreset_clkgenstatus;
+ u32 bistclk_vpudecreset_clkgenconfig;
+ u32 bistclk_vpudecreset_clkgenstatus;
+ u32 bistclk_displayreset_clkgenconfig;
+ u32 bistclk_displayreset_clkgenstatus;
+ u32 bistclk_edisplayreset_clkgenconfig;
+ u32 bistclk_edisplayreset_clkgenstatus;
+ u8 _reserved9[0x78];
+ u32 sdmmcbaseclk_clkgenconfig;
+ u32 sdmmcbaseclk_clkgenstatus;
+ u8 _reserved10[0x08];
+ u32 cfgclk_a2_clkgenconfig;
+ u32 cfgclk_a2_clkgenstatus;
+ u8 _reserved11[0x08];
+ u32 uartclk0_clkgenconfig;
+ u32 uartclk0_clkgenstatus;
+ u8 _reserved12[0x08];
+ u32 uartclk1_clkgenconfig;
+ u32 uartclk1_clkgenstatus;
+ u8 _reserved13[0x08];
+ u32 sspclk0_clkgenconfig;
+ u32 sspclk0_clkgenstatus;
+ u8 _reserved14[0x08];
+ u32 sspclk1_clkgenconfig;
+ u32 sspclk1_clkgenstatus;
+ u8 _reserved15[0x08];
+ u32 i2cclk0_clkgenconfig;
+ u32 i2cclk0_clkgenstatus;
+ u8 _reserved16[0x08];
+ u32 i2cclk1_clkgenconfig;
+ u32 i2cclk1_clkgenstatus;
+ u8 _reserved17[0x08];
+ u32 i2cclk2_clkgenconfig;
+ u32 i2cclk2_clkgenstatus;
+ u8 _reserved18[0x08];
+ u32 i2cclk3_clkgenconfig;
+ u32 i2cclk3_clkgenstatus;
+ u8 _reserved19[0x08];
+ u32 i2cclk4_clkgenconfig;
+ u32 i2cclk4_clkgenstatus;
+};
+
+check_member(mvmap2315_apmu_clk_regs, i2cclk4_clkgenstatus, 0x3A4);
+static struct mvmap2315_apmu_clk_regs * const mvmap2315_apmu_clk
+ = (void *)MVMAP2315_APMU_CLK_BASE;
+
+#define MVMAP2315_AP_RST_EN BIT(0)
+#define MVMAP2315_MCU_RST_EN BIT(0)
+struct mvmap2315_mpmu_clk_regs {
+ u32 resetap;
+ u32 resetmcu;
+ u32 resetstatus;
+ u8 _reserved0[4];
+ u32 apaudiopllselect;
+ u8 _reserved1[0x0c];
+ u32 sspa_asrc_rx_clk0;
+ u32 sspa_asrc_rx_clk1;
+ u32 sspa_asrc_rx_clk2;
+ u32 sspa_asrc_tx_clk0;
+ u32 sspa_asrc_tx_clk1;
+ u32 sspa_asrc_tx_clk2;
+ u32 dmic_asrc_clk;
+ u8 _reserved2[4];
+ u32 uartfracdivcfg0;
+ u8 _reserved3[0x0c];
+ u32 uartfracdivcfg1;
+ u8 _reserved4[0xcc];
+ u32 clk32k_clkgenconfig;
+ u32 clk32k_clkgenstatus;
+ u8 _reserved5[0x08];
+ u32 cpudbgclk_clkgenconfig;
+ u32 cpudbgclk_clkgenstatus;
+ u8 _reserved6[0x08];
+ u32 m4clk_bist_clkgenconfig;
+ u32 m4clk_bist_clkgenstatus;
+ u8 _reserved7[0x08];
+ u32 bspiclk_clkgenconfig;
+ u32 bspiclk_clkgenstatus;
+ u8 _reserved8[0x08];
+ u32 dmicclk_clkgenconfig;
+ u32 dmicclk_clkgenstatus;
+ u8 _reserved9[0x48];
+ u32 sspaclk0_clkgenconfig;
+ u32 sspaclk0_clkgenstatus;
+ u32 sspaclk1_clkgenconfig;
+ u32 sspaclk1_clkgenstatus;
+ u32 sspaclk2_clkgenconfig;
+ u32 sspaclk2_clkgenstatus;
+ u8 _reserved10[0x38];
+ u32 mcuclk_clkgenconfig;
+ u32 mcuclk_clkgenstatus;
+ u8 _reserved11[0x08];
+ u32 mcuclk_cdma_clkgenconfig;
+ u32 mcuclk_cdma_clkgenstatus;
+ u8 _reserved12[0x08];
+ u32 mcuclk_bspi_clkgenconfig;
+ u32 mcuclk_bspi_clkgenstatus;
+ u8 _reserved13[0x08];
+ u32 mcuclk_owi_clkgenconfig;
+ u32 mcuclk_owi_clkgenstatus;
+ u8 _reserved14[0x08];
+ u32 mcuclk_uart0_clkgenconfig;
+ u32 mcuclk_uart0_clkgenstatus;
+ u8 _reserved15[0x08];
+ u32 mcuclk_uart1_clkgenconfig;
+ u32 mcuclk_uart1_clkgenstatus;
+ u8 _reserved16[0x08];
+ u32 mcuclk_ssp0_clkgenconfig;
+ u32 mcuclk_ssp0_clkgenstatus;
+ u8 _reserved17[0x08];
+ u32 mcuclk_ssp1_clkgenconfig;
+ u32 mcuclk_ssp1_clkgenstatus;
+ u8 _reserved18[0x08];
+ u32 mcuclk_sspa0_clkgenconfig;
+ u32 mcuclk_sspa0_clkgenstatus;
+ u8 _reserved19[0x08];
+ u32 mcuclk_sspa1_clkgenconfig;
+ u32 mcuclk_sspa1_clkgenstatus;
+ u8 _reserved20[0x08];
+ u32 mcuclk_sspa2_clkgenconfig;
+ u32 mcuclk_sspa2_clkgenstatus;
+ u8 _reserved21[0x08];
+ u32 mcuclk_dmic0_clkgenconfig;
+ u32 mcuclk_dmic0_clkgenstatus;
+ u8 _reserved22[0x08];
+ u32 mcuclk_dmic1_clkgenconfig;
+ u32 mcuclk_dmic1_clkgenstatus;
+ u8 _reserved23[0x08];
+ u32 mcuclk_dmic2_clkgenconfig;
+ u32 mcuclk_dmic2_clkgenstatus;
+ u8 _reserved24[0x08];
+ u32 mcuclk_dmic3_clkgenconfig;
+ u32 mcuclk_dmic3_clkgenstatus;
+ u8 _reserved25[0x18];
+ u32 dmic_dclk0_clkgenconfig;
+ u32 dmic_dclk0_clkgenstatus;
+ u8 _reserved26[0x08];
+ u32 dmic_dclk1_clkgenconfig;
+ u32 dmic_dclk1_clkgenstatus;
+ u8 _reserved27[0x08];
+ u32 dmic_dclk2_clkgenconfig;
+ u32 dmic_dclk2_clkgenstatus;
+ u8 _reserved28[0x08];
+ u32 dmic_dclk3_clkgenconfig;
+ u32 dmic_dclk3_clkgenstatus;
+ u8 _reserved29[0x08];
+ u32 dmic_engdetclk_clkgenconfig;
+ u32 dmic_engdetclk_clkgenstatus;
+ u8 _reserved30[0x38];
+ u32 refclk_clkgenconfig;
+ u32 refclk_clkgenstatus;
+ u8 _reserved31[0x08];
+ u32 refclk_ssp0_clkgenconfig;
+ u32 refclk_ssp0_clkgenstatus;
+ u8 _reserved32[0x08];
+ u32 refclk_ssp1_clkgenconfig;
+ u32 refclk_ssp1_clkgenstatus;
+ u8 _reserved33[0x08];
+ u32 refclk_uart0_clkgenconfig;
+ u32 refclk_uart0_clkgenstatus;
+ u8 _reserved34[0x08];
+ u32 refclk_uart1_clkgenconfig;
+ u32 refclk_uart1_clkgenstatus;
+ u8 _reserved35[0x08];
+ u32 refclk_i2c0_clkgenconfig;
+ u32 refclk_i2c0_clkgenstatus;
+ u8 _reserved36[0x08];
+ u32 refclk_i2c1_clkgenconfig;
+ u32 refclk_i2c1_clkgenstatus;
+ u8 _reserved37[0x08];
+ u32 refclk_i2c2_clkgenconfig;
+ u32 refclk_i2c2_clkgenstatus;
+ u8 _reserved38[0x08];
+ u32 refclk_i2c3_clkgenconfig;
+ u32 refclk_i2c3_clkgenstatus;
+ u8 _reserved39[0x08];
+ u32 refclk_i2c4_clkgenconfig;
+ u32 refclk_i2c4_clkgenstatus;
+ u8 _reserved40[0x08];
+ u32 refclk_i2c5_clkgenconfig;
+ u32 refclk_i2c5_clkgenstatus;
+ u8 _reserved41[0x08];
+ u32 refclk_sspa0_clkgenconfig;
+ u32 refclk_sspa0_clkgenstatus;
+ u8 _reserved42[0x08];
+ u32 refclk_sspa1_clkgenconfig;
+ u32 refclk_sspa1_clkgenstatus;
+ u8 _reserved43[0x08];
+ u32 refclk_sspa2_clkgenconfig;
+ u32 refclk_sspa2_clkgenstatus;
+ u8 _reserved44[0x08];
+ u32 tsenclk_clkgenconfig;
+ u32 tsenclk_clkgenstatus;
+ u8 _reserved45[0x08];
+ u32 ap_tsenclk_clkgenconfig;
+ u32 ap_tsenclk_clkgenstatus;
+ u8 _reserved46[0x08];
+ u32 sspa_mclk_clkgenconfig;
+ u32 sspa_mclk_clkgenstatus;
+};
+
+check_member(mvmap2315_mpmu_clk_regs, sspa_mclk_clkgenstatus, 0x484);
+static struct mvmap2315_mpmu_clk_regs * const mvmap2315_mpmu_clk
+ = (void *)MVMAP2315_MPMU_CLK_BASE;
+
+void clock_init(void);
+
+#endif /* __SOC_MARVELL_MVMAP2315_CLOCK_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/gic.h b/src/soc/marvell/mvmap2315/include/soc/gic.h
new file mode 100644
index 0000000000..568065cbc7
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/gic.h
@@ -0,0 +1,413 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __SOC_MARVELL_MVMAP2315_GIC_H__
+#define __SOC_MARVELL_MVMAP2315_GIC_H__
+
+#include <stdint.h>
+
+#include <soc/addressmap.h>
+#include <types.h>
+
+#define MVMAP2315_BCM_GICC_EN0 BIT(0)
+#define MVMAP2315_BCM_GICD_FIQ_EN BIT(3)
+struct mvmap2315_bcm_gicc_regs {
+ u32 ctrl;
+ u32 pmr;
+ u32 bpr;
+ u32 iar;
+ u32 eoir;
+ u32 rpr;
+ u32 hppir;
+ u32 abpr;
+ u32 aiar;
+ u32 aeoir;
+ u32 ahppir;
+};
+
+check_member(mvmap2315_bcm_gicc_regs, ahppir, 0x28);
+static struct mvmap2315_bcm_gicc_regs * const mvmap2315_bcm_gicc
+ = (void *)MVMAP2315_BCM_GICC_BASE;
+
+#define MVMAP2315_BCM_GICD_EN0 BIT(0)
+struct mvmap2315_bcm_gicd_regs {
+ u32 ctrl;
+ u32 typer;
+ u32 iidr;
+ u8 _reserved0[0x74];
+ u32 igroup0;
+ u32 igroup1;
+ u32 igroup2;
+ u32 igroup3;
+ u32 igroup4;
+ u32 igroup5;
+ u32 igroup6;
+ u32 igroup7;
+ u32 igroup8;
+ u32 igroup9;
+ u32 igroup10;
+ u32 igroup11;
+ u8 _reserved1[0x50];
+ u32 isenable0;
+ u32 isenable1;
+ u32 isenable2;
+ u32 isenable3;
+ u32 isenable4;
+ u32 isenable5;
+ u32 isenable6;
+ u32 isenable7;
+ u32 isenable8;
+ u32 isenable9;
+ u32 isenable10;
+ u32 isenable11;
+ u8 _reserved2[0x50];
+ u32 icenable0;
+ u32 icenable1;
+ u32 icenable2;
+ u32 icenable3;
+ u32 icenable4;
+ u32 icenable5;
+ u32 icenable6;
+ u32 icenable7;
+ u32 icenable8;
+ u32 icenable9;
+ u32 icenable10;
+ u32 icenable11;
+ u8 _reserved3[0x50];
+ u32 ispendr0;
+ u32 ispendr1;
+ u32 ispendr2;
+ u32 ispendr3;
+ u32 ispendr4;
+ u32 ispendr5;
+ u32 ispendr6;
+ u32 ispendr7;
+ u32 ispendr8;
+ u32 ispendr9;
+ u32 ispendr10;
+ u32 ispendr11;
+ u8 _reserved4[0x50];
+ u32 icpendr0;
+ u32 icpendr1;
+ u32 icpendr2;
+ u32 icpendr3;
+ u32 icpendr4;
+ u32 icpendr5;
+ u32 icpendr6;
+ u32 icpendr7;
+ u32 icpendr8;
+ u32 icpendr9;
+ u32 icpendr10;
+ u32 icpendr11;
+ u8 _reserved5[0x50];
+ u32 isactive0;
+ u32 isactive1;
+ u32 isactive2;
+ u32 isactive3;
+ u32 isactive4;
+ u32 isactive5;
+ u32 isactive6;
+ u32 isactive7;
+ u32 isactive8;
+ u32 isactive9;
+ u32 isactive10;
+ u32 isactive11;
+ u8 _reserved6[0x50];
+ u32 icactive0;
+ u32 icactive1;
+ u32 icactive2;
+ u32 icactive3;
+ u32 icactive4;
+ u32 icactive5;
+ u32 icactive6;
+ u32 icactive7;
+ u32 icactive8;
+ u32 icactive9;
+ u32 icactive10;
+ u32 icactive11;
+ u8 _reserved7[0x50];
+ u32 ipriority0;
+ u32 ipriority1;
+ u32 ipriority2;
+ u32 ipriority3;
+ u32 ipriority4;
+ u32 ipriority5;
+ u32 ipriority6;
+ u32 ipriority7;
+ u32 ipriority8;
+ u32 ipriority9;
+ u32 ipriority10;
+ u32 ipriority11;
+ u32 ipriority12;
+ u32 ipriority13;
+ u32 ipriority14;
+ u32 ipriority15;
+ u32 ipriority16;
+ u32 ipriority17;
+ u32 ipriority18;
+ u32 ipriority19;
+ u32 ipriority20;
+ u32 ipriority21;
+ u32 ipriority22;
+ u32 ipriority23;
+ u32 ipriority24;
+ u32 ipriority25;
+ u32 ipriority26;
+ u32 ipriority27;
+ u32 ipriority28;
+ u32 ipriority29;
+ u32 ipriority30;
+ u32 ipriority31;
+ u32 ipriority32;
+ u32 ipriority33;
+ u32 ipriority34;
+ u32 ipriority35;
+ u32 ipriority36;
+ u32 ipriority37;
+ u32 ipriority38;
+ u32 ipriority39;
+ u32 ipriority40;
+ u32 ipriority41;
+ u32 ipriority42;
+ u32 ipriority43;
+ u32 ipriority44;
+ u32 ipriority45;
+ u32 ipriority46;
+ u32 ipriority47;
+ u32 ipriority48;
+ u32 ipriority49;
+ u32 ipriority50;
+ u32 ipriority51;
+ u32 ipriority52;
+ u32 ipriority53;
+ u32 ipriority54;
+ u32 ipriority55;
+ u32 ipriority56;
+ u32 ipriority57;
+ u32 ipriority58;
+ u32 ipriority59;
+ u32 ipriority60;
+ u32 ipriority61;
+ u32 ipriority62;
+ u32 ipriority63;
+ u32 ipriority64;
+ u32 ipriority65;
+ u32 ipriority66;
+ u32 ipriority67;
+ u32 ipriority68;
+ u32 ipriority69;
+ u32 ipriority70;
+ u32 ipriority71;
+ u32 ipriority72;
+ u32 ipriority73;
+ u32 ipriority74;
+ u32 ipriority75;
+ u32 ipriority76;
+ u32 ipriority77;
+ u32 ipriority78;
+ u32 ipriority79;
+ u32 ipriority80;
+ u32 ipriority81;
+ u32 ipriority82;
+ u32 ipriority83;
+ u32 ipriority84;
+ u32 ipriority85;
+ u32 ipriority86;
+ u32 ipriority87;
+ u32 ipriority88;
+ u32 ipriority89;
+ u32 ipriority90;
+ u32 ipriority91;
+ u32 ipriority92;
+ u32 ipriority93;
+ u32 ipriority94;
+ u32 ipriority95;
+ u8 _reserved8[0x280];
+ u32 itargets0;
+ u32 itargets1;
+ u32 itargets2;
+ u32 itargets3;
+ u32 itargets4;
+ u32 itargets5;
+ u32 itargets6;
+ u32 itargets7;
+ u32 itargets8;
+ u32 itargets9;
+ u32 itargets10;
+ u32 itargets11;
+ u32 itargets12;
+ u32 itargets13;
+ u32 itargets14;
+ u32 itargets15;
+ u32 itargets16;
+ u32 itargets17;
+ u32 itargets18;
+ u32 itargets19;
+ u32 itargets20;
+ u32 itargets21;
+ u32 itargets22;
+ u32 itargets23;
+ u32 itargets24;
+ u32 itargets25;
+ u32 itargets26;
+ u32 itargets27;
+ u32 itargets28;
+ u32 itargets29;
+ u32 itargets30;
+ u32 itargets31;
+ u32 itargets32;
+ u32 itargets33;
+ u32 itargets34;
+ u32 itargets35;
+ u32 itargets36;
+ u32 itargets37;
+ u32 itargets38;
+ u32 itargets39;
+ u32 itargets40;
+ u32 itargets41;
+ u32 itargets42;
+ u32 itargets43;
+ u32 itargets44;
+ u32 itargets45;
+ u32 itargets46;
+ u32 itargets47;
+ u32 itargets48;
+ u32 itargets49;
+ u32 itargets50;
+ u32 itargets51;
+ u32 itargets52;
+ u32 itargets53;
+ u32 itargets54;
+ u32 itargets55;
+ u32 itargets56;
+ u32 itargets57;
+ u32 itargets58;
+ u32 itargets59;
+ u32 itargets60;
+ u32 itargets61;
+ u32 itargets62;
+ u32 itargets63;
+ u32 itargets64;
+ u32 itargets65;
+ u32 itargets66;
+ u32 itargets67;
+ u32 itargets68;
+ u32 itargets69;
+ u32 itargets70;
+ u32 itargets71;
+ u32 itargets72;
+ u32 itargets73;
+ u32 itargets74;
+ u32 itargets75;
+ u32 itargets76;
+ u32 itargets77;
+ u32 itargets78;
+ u32 itargets79;
+ u32 itargets80;
+ u32 itargets81;
+ u32 itargets82;
+ u32 itargets83;
+ u32 itargets84;
+ u32 itargets85;
+ u32 itargets86;
+ u32 itargets87;
+ u32 itargets88;
+ u32 itargets89;
+ u32 itargets90;
+ u32 itargets91;
+ u32 itargets92;
+ u32 itargets93;
+ u32 itargets94;
+ u32 itargets95;
+ u8 _reserved9[0x280];
+ u32 icfg0;
+ u32 icfg1;
+ u32 icfg2;
+ u32 icfg3;
+ u32 icfg4;
+ u32 icfg5;
+ u32 icfg6;
+ u32 icfg7;
+ u32 icfg8;
+ u32 icfg9;
+ u32 icfg10;
+ u32 icfg11;
+ u32 icfg12;
+ u32 icfg13;
+ u32 icfg14;
+ u32 icfg15;
+ u32 icfg16;
+ u32 icfg17;
+ u32 icfg18;
+ u32 icfg19;
+ u32 icfg20;
+ u32 icfg21;
+ u32 icfg22;
+ u32 icfg23;
+ u8 _reserved10[0xa0];
+ u32 ppisr;
+ u32 spisr0;
+ u32 spisr1;
+ u32 spisr2;
+ u32 spisr3;
+ u32 spisr4;
+ u32 spisr5;
+ u32 spisr6;
+ u32 spisr7;
+ u32 spisr8;
+ u32 spisr9;
+ u32 spisr10;
+ u8 _reserved11[0xd0];
+ u32 nsacr0;
+ u32 nsacr1;
+ u32 nsacr2;
+ u32 nsacr3;
+ u32 nsacr4;
+ u32 nsacr5;
+ u32 nsacr6;
+ u32 nsacr7;
+ u32 nsacr8;
+ u32 nsacr9;
+ u32 nsacr10;
+ u32 nsacr11;
+ u32 nsacr12;
+ u32 nsacr13;
+ u32 nsacr14;
+ u32 nsacr15;
+ u32 nsacr16;
+ u32 nsacr17;
+ u32 nsacr18;
+ u32 nsacr19;
+ u32 nsacr20;
+ u32 nsacr21;
+ u8 _reserved12[0xa8];
+ u32 sgir;
+ u8 _reserved13[0x0c];
+ u32 cpendsgir0;
+ u32 cpendsgir1;
+ u32 cpendsgir2;
+ u32 cpendsgir3;
+ u32 spendsgir0;
+ u32 spendsgir1;
+ u32 spendsgir2;
+ u32 spendsgir3;
+};
+
+check_member(mvmap2315_bcm_gicd_regs, spendsgir3, 0xF2C);
+static struct mvmap2315_bcm_gicd_regs * const mvmap2315_bcm_gicd
+ = (void *)MVMAP2315_BCM_GICD_BASE;
+
+void enable_bcm_gic(void);
+
+#endif /* __SOC_MARVELL_MVMAP2315_GIC_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/memlayout.ld b/src/soc/marvell/mvmap2315/include/soc/memlayout.ld
new file mode 100644
index 0000000000..e0f497aa28
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/memlayout.ld
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <memlayout.h>
+#include <arch/header.ld>
+
+SECTIONS
+{
+ DRAM_START(0x00000000)
+
+#if ENV_RAMSTAGE
+ STACK(0x00080010, 8K)
+#endif
+ POSTRAM_CBFS_CACHE(0x1C0000, 256K)
+ RAMSTAGE(0x00200000, 640K)
+ TTB(0x00300000, 1024K)
+
+ SRAM_START(0xE0000000)
+
+ REGION(BDB, 0xE0000000, 8K, 1)
+ REGION(BootROM_CB, 0xE0002000, 24K, 1)
+
+#if ENV_BOOTBLOCK
+ STACK(0xE0008000, 2K)
+#endif
+
+#if ENV_ROMSTAGE
+ STACK(0xE0008800, 2K)
+#endif
+
+#if ENV_ROMSTAGE || ENV_BOOTBLOCK
+
+ TIMESTAMP(0xE0009000, 1K)
+#endif
+
+ PRERAM_CBFS_CACHE(0xE0009400, 256)
+ PRERAM_CBMEM_CONSOLE(0xE0009500, 8K)
+ REGION(fiq_stack, 0xE000B500, 2560, 1)
+ BOOTBLOCK(0xE000C000, 16K)
+ ROMSTAGE(0xE0010000, 64K)
+ REGION(apmu, 0xE0020000, 64K, 1)
+ SRAM_END(0xE0030000)
+}
diff --git a/src/soc/marvell/mvmap2315/include/soc/mmu_operations.h b/src/soc/marvell/mvmap2315/include/soc/mmu_operations.h
new file mode 100644
index 0000000000..13c2c445fd
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/mmu_operations.h
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_MMU_OPERATIONS_H__
+#define __SOC_MARVELL_MVMAP2315_MMU_OPERATIONS_H__
+
+#include <stdint.h>
+
+#define MVMAP2315_FLASH_SIZE 0x02000000
+#define MVMAP2315_RAM_SIZE 0x80000000
+#define MVMAP2315_DEVICE_SIZE 0x7E000000
+#define MVMAP2315_LCM_SIZE 0x00020000
+
+void mvmap2315_mmu_init(void);
+
+#endif /*__SOC_MARVELL_MVMAP2315_MMU_OPERATIONS_H__*/
diff --git a/src/soc/marvell/mvmap2315/include/soc/pinmux.h b/src/soc/marvell/mvmap2315/include/soc/pinmux.h
new file mode 100644
index 0000000000..9a1f8071f7
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/pinmux.h
@@ -0,0 +1,86 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_PINMUX_H__
+#define __SOC_MARVELL_MVMAP2315_PINMUX_H__
+
+#include <stdint.h>
+
+#include <soc/addressmap.h>
+#include <types.h>
+
+#define PINMUX(a, b, c, d, e, f) ((struct mvmap2315_pinmux) { \
+ .pad = a, \
+ .fun_sel = b, \
+ .raw_sel = c, \
+ .dgtb_sel = d, \
+ .slew = e, \
+ .pull_sel = f})
+
+#define MVMAP2315_PADWRAP_FUNC_SEL (BIT(0) | BIT(1) | BIT(2))
+#define MVMAP2315_PADWRAP_RAW_SEL BIT(3)
+#define MVMAP2315_PADWRAP_DGTB_SEL (BIT(4) | BIT(5) | BIT(6) | BIT(7))
+#define MVMAP2315_PADWRAP_SLEW (BIT(11) | BIT(12))
+#define MVMAP2315_PADWRAP_PD_EN BIT(13)
+#define MVMAP2315_PADWRAP_PU_EN BIT(14)
+
+#define MVMAP2315_PADWRAP_FUNC_SEL_SHIFT 0
+#define MVMAP2315_PADWRAP_RAW_SEL_SHIFT 3
+#define MVMAP2315_PADWRAP_DGTB_SEL_SHIFT 4
+#define MVMAP2315_PADWRAP_SLEW_SHIFT 11
+struct mvmap2315_pinmux_regs {
+ u32 io_pad_piocfg[72];
+ u8 _reserved0[0xee0];
+ u32 pc_pwrdwn_g29_pwrdn;
+ u32 pc_v18en_lvl_g29;
+ u32 vdd3p3_1p8_g29_reg_pwrdn;
+ u32 pc_pwrdwn_g30_pwrdn;
+ u32 pc_v18en_lvl_g30;
+ u32 vdd3p3_1p8_g30_reg_pwrdn;
+ u32 pc_pwrdwn_g31_pwrdn;
+ u32 pc_v18en_lvl_g31;
+ u32 vdd3p3_1p8_g31_reg_pwrdn;
+ u32 pc_pwrdwn_g32_pwrdn;
+ u32 pc_v18en_lvl_g32;
+ u32 vdd3p3_1p8_g32_reg_pwrdn;
+ u32 pc_pwrdwn_g33_pwrdn;
+ u32 pc_v18en_lvl_g33;
+ u32 vdd3p3_1p8_g33_reg_pwrdn;
+};
+
+check_member(mvmap2315_pinmux_regs, vdd3p3_1p8_g33_reg_pwrdn, 0x1038);
+static struct mvmap2315_pinmux_regs * const mvmap2315_pinmux
+ = (void *)MVMAP2315_PINMUX_BASE;
+
+struct mvmap2315_pinmux {
+ u32 pad;
+ u32 fun_sel;
+ u32 raw_sel;
+ u32 dgtb_sel;
+ u32 slew;
+ u32 pull_sel;
+};
+
+check_member(mvmap2315_pinmux, pull_sel, 0x14);
+
+enum {
+ PULLNONE = 0,
+ PULLDOWN = 1,
+ PULLUP = 2
+};
+
+void set_pinmux(struct mvmap2315_pinmux pinmux);
+
+#endif /* __SOC_MARVELL_MVMAP2315_PINMUX_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/reset.h b/src/soc/marvell/mvmap2315/include/soc/reset.h
new file mode 100644
index 0000000000..348c9083ea
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/reset.h
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __SOC_MARVELL_MVMAP2315_RESET_H__
+#define __SOC_MARVELL_MVMAP2315_RESET_H__
+
+#include <stdint.h>
+
+void mvmap2315_reset(void);
+
+#endif /* __SOC_MARVELL_MVMAP2315_RESET_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/sdram.h b/src/soc/marvell/mvmap2315/include/soc/sdram.h
new file mode 100644
index 0000000000..ee87275513
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/sdram.h
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __SOC_MARVELL_MVMAP2315_SDRAM_H__
+#define __SOC_MARVELL_MVMAP2315_SDRAM_H__
+
+#include <stdint.h>
+
+size_t sdram_size_mb(void);
+
+#endif /* __SOC_MARVELL_MVMAP2315_SDRAM_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/timer.h b/src/soc/marvell/mvmap2315/include/soc/timer.h
new file mode 100644
index 0000000000..c335e4939d
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/timer.h
@@ -0,0 +1,49 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_TIMER_H__
+#define __SOC_MARVELL_MVMAP2315_TIMER_H__
+
+#include <stdint.h>
+
+#include <soc/addressmap.h>
+#include <types.h>
+
+#define MVMAP2315_CLOCKS_PER_USEC 13
+
+#define MVMAP2315_TIMER_T1CR_TE BIT(0)
+#define MVMAP2315_TIMER_T1CR_TM BIT(1)
+#define MVMAP2315_TIMER_T1CR_TIM BIT(2)
+#define MVMAP2315_TIMER_T1CR_TPWM BIT(3)
+
+struct mvmap2315_timer_regs {
+ u32 t1lc;
+ u32 t1cv;
+ u32 t1cr;
+ u32 t1eoi;
+ u32 t1is;
+ u8 _reserved0[0x8c];
+ u32 tis;
+ u32 teoi;
+ u32 tris;
+ u32 tcv;
+ u32 t1lc2;
+};
+
+check_member(mvmap2315_timer_regs, t1lc2, 0xB0);
+static struct mvmap2315_timer_regs * const mvmap2315_timer0
+ = (void *)MVMAP2315_TIMER0_BASE;
+
+#endif /* __SOC_MARVELL_MVMAP2315_TIMER_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/uart.h b/src/soc/marvell/mvmap2315/include/soc/uart.h
new file mode 100644
index 0000000000..36b79f2e55
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/uart.h
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_UART_H__
+#define __SOC_MARVELL_MVMAP2315_UART_H__
+
+#include <stdint.h>
+
+extern u32 uart_num;
+
+#endif /* __SOC_MARVELL_MVMAP2315_UART_H__ */
diff --git a/src/soc/marvell/mvmap2315/media.c b/src/soc/marvell/mvmap2315/media.c
new file mode 100644
index 0000000000..9b782613b2
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/media.c
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <boot_device.h>
+#include <soc/addressmap.h>
+#include <symbols.h>
+
+static struct mem_region_device mdev =
+ MEM_REGION_DEV_RO_INIT((void *)MVMAP2315_CBFS_BASE, CONFIG_ROM_SIZE);
+
+const struct region_device *boot_device_ro(void)
+{
+ return &mdev.rdev;
+}
diff --git a/src/soc/marvell/mvmap2315/mmu_operations.c b/src/soc/marvell/mvmap2315/mmu_operations.c
new file mode 100644
index 0000000000..6deceb39ac
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/mmu_operations.c
@@ -0,0 +1,52 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <memrange.h>
+#include <arch/mmu.h>
+#include <soc/addressmap.h>
+#include <soc/mmu_operations.h>
+
+static void mvmap2315_mmu_config(void)
+{
+ const unsigned long ram_mem = MA_MEM | MA_NS | MA_RW;
+ const unsigned long dev_mem = MA_DEV | MA_S | MA_RW;
+ const unsigned long lcm_mem = MA_MEM | MA_NS | MA_RW | MA_MEM_NC;
+ const unsigned long flash_mem = MA_MEM | MA_S | MA_RW;
+
+ mmu_config_range((void *)MVMAP2315_RAM_BASE,
+ MVMAP2315_RAM_SIZE, ram_mem);
+
+ mmu_config_range((void *)MVMAP2315_DEVICE_BASE,
+ MVMAP2315_DEVICE_SIZE, dev_mem);
+
+ mmu_config_range((void *)MVMAP2315_LCM_BASE,
+ MVMAP2315_LCM_SIZE, lcm_mem);
+
+ mmu_config_range((void *)MVMAP2315_FLASH_BASE,
+ MVMAP2315_FLASH_SIZE, flash_mem);
+}
+
+void mvmap2315_mmu_init(void)
+{
+ mmu_init();
+
+ mvmap2315_mmu_config();
+
+ mmu_enable();
+}
diff --git a/src/soc/marvell/mvmap2315/pinmux.c b/src/soc/marvell/mvmap2315/pinmux.c
new file mode 100644
index 0000000000..159d62e175
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/pinmux.c
@@ -0,0 +1,64 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/io.h>
+#include <soc/pinmux.h>
+
+void set_pinmux(struct mvmap2315_pinmux pinmux)
+{
+ u32 pad_num;
+ u32 reg = 0;
+
+ /* pads < 160 are part of the MCU domain and not handled here
+ * and pads > 231 don't exist
+ */
+ if (pinmux.pad < 160 || pinmux.pad > 231)
+ return;
+
+ pad_num = pinmux.pad - 160;
+
+ reg |= (pinmux.fun_sel <<
+ MVMAP2315_PADWRAP_FUNC_SEL_SHIFT) &
+ MVMAP2315_PADWRAP_FUNC_SEL;
+
+ reg |= (pinmux.raw_sel <<
+ MVMAP2315_PADWRAP_RAW_SEL_SHIFT) &
+ MVMAP2315_PADWRAP_RAW_SEL;
+
+ reg |= (pinmux.dgtb_sel <<
+ MVMAP2315_PADWRAP_DGTB_SEL_SHIFT) &
+ MVMAP2315_PADWRAP_DGTB_SEL;
+
+ reg |= (pinmux.slew <<
+ MVMAP2315_PADWRAP_SLEW_SHIFT) &
+ MVMAP2315_PADWRAP_SLEW;
+
+ if (!pinmux.pull_sel) {
+ reg &= ~MVMAP2315_PADWRAP_PD_EN;
+ reg &= ~MVMAP2315_PADWRAP_PU_EN;
+ } else if (pinmux.pull_sel == 1) {
+ reg |= MVMAP2315_PADWRAP_PD_EN;
+ reg &= ~MVMAP2315_PADWRAP_PU_EN;
+ } else if (pinmux.pull_sel == 2) {
+ reg &= ~MVMAP2315_PADWRAP_PD_EN;
+ reg |= MVMAP2315_PADWRAP_PU_EN;
+ }
+
+ write32(&mvmap2315_pinmux->io_pad_piocfg[pad_num], reg);
+}
diff --git a/src/soc/marvell/mvmap2315/ramstage_entry.S b/src/soc/marvell/mvmap2315/ramstage_entry.S
new file mode 100644
index 0000000000..8d108b300f
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/ramstage_entry.S
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/asm.h>
+
+ENTRY(stage_entry)
+ /* Initialize stack with sentinel value to later check overflow. */
+ ldr x2, =0xdeadbeefdeadbeef
+ ldr x0, =_stack
+ ldr x1, =_estack
+1:
+ stp x2, x2, [x0], #16
+ cmp x0, x1
+ bne 1b
+
+ bl main
+ENDPROC(stage_entry)
diff --git a/src/soc/marvell/mvmap2315/reset.c b/src/soc/marvell/mvmap2315/reset.c
new file mode 100644
index 0000000000..531f4a0b50
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/reset.c
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/io.h>
+#include <soc/clock.h>
+#include <soc/reset.h>
+
+void mvmap2315_reset(void)
+{
+ clrbits_le32(&mvmap2315_mpmu_clk->resetmcu, MVMAP2315_MCU_RST_EN);
+ clrbits_le32(&mvmap2315_mpmu_clk->resetap, MVMAP2315_AP_RST_EN);
+}
diff --git a/src/soc/marvell/mvmap2315/romstage.c b/src/soc/marvell/mvmap2315/romstage.c
new file mode 100644
index 0000000000..dfd3bcf91a
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/romstage.c
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/exception.h>
+#include <cbmem.h>
+#include <console/console.h>
+#include <program_loading.h>
+#include <soc/clock.h>
+#include <soc/mmu_operations.h>
+
+void main(void)
+{
+ console_init();
+
+ exception_init();
+
+ clock_init();
+
+ mvmap2315_mmu_init();
+
+ cbmem_initialize_empty();
+
+ run_ramstage();
+}
diff --git a/src/soc/marvell/mvmap2315/romstage_entry.S b/src/soc/marvell/mvmap2315/romstage_entry.S
new file mode 100644
index 0000000000..586b57ee84
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/romstage_entry.S
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/asm.h>
+
+ENTRY(stage_entry)
+ /* Initialize PSTATE, SCTLR and caches to clean state, set up stack. */
+ bl arm64_init_cpu
+
+ bl main
+ENDPROC(stage_entry)
diff --git a/src/soc/marvell/mvmap2315/sdram.c b/src/soc/marvell/mvmap2315/sdram.c
new file mode 100644
index 0000000000..2d17137c55
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/sdram.c
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <soc/sdram.h>
+
+size_t sdram_size_mb(void)
+{
+ return CONFIG_DRAM_SIZE_MB;
+}
diff --git a/src/soc/marvell/mvmap2315/soc.c b/src/soc/marvell/mvmap2315/soc.c
new file mode 100644
index 0000000000..d05eca6cd0
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/soc.c
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <device/device.h>
+#include <soc/addressmap.h>
+#include <symbols.h>
+
+static void soc_enable(device_t dev)
+{
+ ram_resource(dev, 0, 0x0, MAX_DRAM_ADDRESS / KiB);
+}
+
+static struct device_operations soc_ops = {
+ .enable_resources = soc_enable,
+};
+
+static void enable_mvmap2315_dev(device_t dev)
+{
+ dev->ops = &soc_ops;
+}
+
+struct chip_operations soc_marvell_mvmap2315_ops = {
+ CHIP_NAME("SOC Marvell MVMAP2315")
+ .enable_dev = enable_mvmap2315_dev,
+};
diff --git a/src/soc/marvell/mvmap2315/timer.c b/src/soc/marvell/mvmap2315/timer.c
new file mode 100644
index 0000000000..7922e05a79
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/timer.c
@@ -0,0 +1,63 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/io.h>
+#include <delay.h>
+#include <soc/timer.h>
+#include <timer.h>
+
+void init_timer(void)
+{
+ /* disable timer */
+ clrbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TE);
+
+ /* set to free-running mode (loads max value at timer expiration) */
+ clrbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TM);
+
+ /* mask interrupt (not currently used) */
+ setbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TIM);
+
+ /* disable PWM output */
+ clrbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TPWM);
+
+ /* perform dummy read to clear all active interrupts */
+ read32(&mvmap2315_timer0->t1eoi);
+
+ /* must provide an initial load count even in free-running mode */
+ write32(&mvmap2315_timer0->t1lc, 0xFFFFFFFF);
+
+ /* enable timer */
+ setbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TE);
+
+ /* busy wait until timer count is non-zero */
+ while (!read32(&mvmap2315_timer0->t1cv))
+ ;
+}
+
+static u32 timer_raw_value(void)
+{
+ /* invert count to change from down to up count */
+ return ~read32(&mvmap2315_timer0->t1cv);
+}
+
+void timer_monotonic_get(struct mono_time *mt)
+{
+ mt->microseconds = (long)(timer_raw_value() /
+ MVMAP2315_CLOCKS_PER_USEC);
+}
diff --git a/src/soc/marvell/mvmap2315/uart.c b/src/soc/marvell/mvmap2315/uart.c
new file mode 100644
index 0000000000..51c74fcf23
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/uart.c
@@ -0,0 +1,49 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <assert.h>
+#include <console/uart.h>
+#include <rules.h>
+#include <stdint.h>
+#include <soc/uart.h>
+
+#if ENV_BOOTBLOCK
+u32 uart_num;
+#endif
+
+unsigned int uart_platform_refclk(void)
+{
+ return 160690;
+}
+
+uintptr_t uart_platform_base(int idx)
+{
+ /* Default to UART 0 */
+ u32 base = CONFIG_CONSOLE_SERIAL_MVMAP2315_UART_ADDRESS;
+
+#if ENV_BOOTBLOCK
+ assert((uart_num >= 0) && (uart_num <= 1));
+ base += uart_num * 0x1000;
+#else
+ assert((idx >= 0) && (idx <= 1));
+ base += idx * 0x1000;
+#endif
+
+ return base;
+}