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-rw-r--r--src/soc/intel/xeon_sp/bootblock.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/bootblock.c b/src/soc/intel/xeon_sp/bootblock.c
index 453c383897..8e236f2942 100644
--- a/src/soc/intel/xeon_sp/bootblock.c
+++ b/src/soc/intel/xeon_sp/bootblock.c
@@ -21,6 +21,7 @@
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <intelblocks/lpc_lib.h>
+#include <soc/pci_devs.h>
const FSPT_UPD temp_ram_init_params = {
.FspUpdHeader = {
@@ -54,6 +55,11 @@ void bootblock_soc_early_init(void)
{
fast_spi_early_init(SPI_BASE_ADDRESS);
pch_enable_lpc();
+
+ /* Set up P2SB BAR. This is needed for PCR to work */
+ uint8_t p2sb_cmd = pci_mmio_read_config8(PCH_DEV_P2SB, PCI_COMMAND);
+ pci_mmio_write_config8(PCH_DEV_P2SB, PCI_COMMAND, p2sb_cmd | PCI_COMMAND_MEMORY);
+ pci_mmio_write_config32(PCH_DEV_P2SB, PCI_BASE_ADDRESS_0, CONFIG_PCR_BASE_ADDRESS);
}
void bootblock_soc_init(void)