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-rwxr-xr-xsrc/soc/broadcom/cygnus/include/soc/ddr_bist.h2
-rwxr-xr-xsrc/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h2
-rwxr-xr-xsrc/soc/broadcom/cygnus/include/soc/shmoo_and28/ydc_ddr_bist.h2
-rw-r--r--src/soc/nvidia/tegra132/include/soc/id.h2
-rw-r--r--src/soc/nvidia/tegra210/include/soc/id.h2
-rw-r--r--src/soc/qualcomm/ipq806x/include/soc/clock.h2
-rw-r--r--src/soc/qualcomm/ipq806x/include/soc/spi.h2
-rw-r--r--src/soc/samsung/exynos5250/include/soc/cpu.h2
-rw-r--r--src/soc/samsung/exynos5420/include/soc/cpu.h2
9 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/broadcom/cygnus/include/soc/ddr_bist.h b/src/soc/broadcom/cygnus/include/soc/ddr_bist.h
index 007a80aa48..bce52226ac 100755
--- a/src/soc/broadcom/cygnus/include/soc/ddr_bist.h
+++ b/src/soc/broadcom/cygnus/include/soc/ddr_bist.h
@@ -154,6 +154,6 @@ enum drc_reg_set {
#define DRC_REG_WRITE(unit, channel, reg, rv) \
soc_reg32_set((volatile uint32*)(channel + 4 * reg), rv)
-#endif /* #ifndef __SOC_BROADCOM_CYGNUS_DDR_BIST_H__*/
+#endif /* __SOC_BROADCOM_CYGNUS_DDR_BIST_H__ */
/* End of File */
diff --git a/src/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h b/src/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h
index e9eec9ab4c..166cc0bb86 100755
--- a/src/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h
+++ b/src/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h
@@ -11266,6 +11266,6 @@
#define DDR34_CORE_PHY_BYTE_LANE_1_BL_SPARE_REG_reserved_for_eco0_SHIFT 0
#define DDR34_CORE_PHY_BYTE_LANE_1_BL_SPARE_REG_reserved_for_eco0_DEFAULT 0x00000000
-#endif /* #ifndef __SOC_BROADCOM_CYGNUS_PHY_AND28_E2_H__ */
+#endif /* __SOC_BROADCOM_CYGNUS_PHY_AND28_E2_H__ */
/* End of File */
diff --git a/src/soc/broadcom/cygnus/include/soc/shmoo_and28/ydc_ddr_bist.h b/src/soc/broadcom/cygnus/include/soc/shmoo_and28/ydc_ddr_bist.h
index 0efd3ac5e9..97fba1740c 100755
--- a/src/soc/broadcom/cygnus/include/soc/shmoo_and28/ydc_ddr_bist.h
+++ b/src/soc/broadcom/cygnus/include/soc/shmoo_and28/ydc_ddr_bist.h
@@ -1145,6 +1145,6 @@ extern int soc_ydc_ddr_bist_run(int unit, int phy_ndx,
/****************************************************************************
* Datatype Definitions.
***************************************************************************/
-#endif /* #ifndef __SOC_BROADCOM_CYGNUS_YDC_DDR_BIST_H__ */
+#endif /* __SOC_BROADCOM_CYGNUS_YDC_DDR_BIST_H__ */
/* End of File */
diff --git a/src/soc/nvidia/tegra132/include/soc/id.h b/src/soc/nvidia/tegra132/include/soc/id.h
index 198e3c4fdd..907285614c 100644
--- a/src/soc/nvidia/tegra132/include/soc/id.h
+++ b/src/soc/nvidia/tegra132/include/soc/id.h
@@ -28,4 +28,4 @@ static inline int context_avp(void)
return read32(uptag) == avp_id;
}
-#endif /* define __SOC_NVIDIA_TEGRA132_INCLUDE_SOC_ID_H__ */
+#endif /* __SOC_NVIDIA_TEGRA132_INCLUDE_SOC_ID_H__ */
diff --git a/src/soc/nvidia/tegra210/include/soc/id.h b/src/soc/nvidia/tegra210/include/soc/id.h
index 5e487d2d6b..0903ba98ef 100644
--- a/src/soc/nvidia/tegra210/include/soc/id.h
+++ b/src/soc/nvidia/tegra210/include/soc/id.h
@@ -28,4 +28,4 @@ static inline int context_avp(void)
return read32(uptag) == avp_id;
}
-#endif /* define __SOC_NVIDIA_TEGRA210_INCLUDE_SOC_ID_H__ */
+#endif /* __SOC_NVIDIA_TEGRA210_INCLUDE_SOC_ID_H__ */
diff --git a/src/soc/qualcomm/ipq806x/include/soc/clock.h b/src/soc/qualcomm/ipq806x/include/soc/clock.h
index ab50d3f32f..482deadfe7 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/clock.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/clock.h
@@ -194,4 +194,4 @@ void nand_clock_config(void);
void usb_clock_config(void);
int audio_clock_config(unsigned frequency);
-#endif /* __PLATFORM_IPQ860X_CLOCK_H_ */
+#endif /* __IPQ860X_CLOCK_H_ */
diff --git a/src/soc/qualcomm/ipq806x/include/soc/spi.h b/src/soc/qualcomm/ipq806x/include/soc/spi.h
index 6d816daf5e..3e623463cc 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/spi.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/spi.h
@@ -276,4 +276,4 @@ static inline struct ipq_spi_slave *to_ipq_spi(struct spi_slave *slave)
return container_of(slave, struct ipq_spi_slave, slave);
}
-#endif /* _IPQ_SPI_H_ */
+#endif /* _IPQ806X_SPI_H_ */
diff --git a/src/soc/samsung/exynos5250/include/soc/cpu.h b/src/soc/samsung/exynos5250/include/soc/cpu.h
index 3ee3d13540..24bb96ffe2 100644
--- a/src/soc/samsung/exynos5250/include/soc/cpu.h
+++ b/src/soc/samsung/exynos5250/include/soc/cpu.h
@@ -81,4 +81,4 @@ static inline u32 get_fb_base_kb(void)
return RAM_BASE_KB + RAM_SIZE_KB - FB_SIZE_KB;
}
-#endif /* _EXYNOS5250_CPU_H */
+#endif /* CPU_SAMSUNG_EXYNOS5250_CPU_H */
diff --git a/src/soc/samsung/exynos5420/include/soc/cpu.h b/src/soc/samsung/exynos5420/include/soc/cpu.h
index f268a5c476..f523b4104d 100644
--- a/src/soc/samsung/exynos5420/include/soc/cpu.h
+++ b/src/soc/samsung/exynos5420/include/soc/cpu.h
@@ -92,4 +92,4 @@ static inline u32 get_fb_base_kb(void)
/* Procedures to setup Exynos5420 CPU */
void exynos5420_config_smp(void);
-#endif /* _EXYNOS5420_CPU_H */
+#endif /* CPU_SAMSUNG_EXYNOS5420_CPU_H */