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-rw-r--r--src/soc/intel/jasperlake/romstage/fsp_params.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/romstage/fsp_params.c b/src/soc/intel/jasperlake/romstage/fsp_params.c
index 528ef0fd21..cd70807516 100644
--- a/src/soc/intel/jasperlake/romstage/fsp_params.c
+++ b/src/soc/intel/jasperlake/romstage/fsp_params.c
@@ -4,6 +4,7 @@
#include <console/console.h>
#include <device/device.h>
#include <fsp/util.h>
+#include <soc/iomap.h>
#include <soc/pci_devs.h>
#include <soc/romstage.h>
#include <soc/soc_chip.h>
@@ -81,6 +82,18 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
/* VT-d config */
m_cfg->VtdDisable = 0;
+ m_cfg->VtdIopEnable = 0x1;
+
+ if (m_cfg->InternalGfx) {
+ m_cfg->VtdIgdEnable = 0x1;
+ m_cfg->VtdBaseAddress[0] = GFXVT_BASE_ADDRESS;
+ }
+
+ if (m_cfg->SaIpuEnable) {
+ m_cfg->VtdIpuEnable = 0x1;
+ m_cfg->VtdBaseAddress[1] = IPUVT_BASE_ADDRESS;
+ }
+ m_cfg->VtdBaseAddress[2] = VTVC0_BASE_ADDRESS;
m_cfg->SerialIoUartDebugControllerNumber = CONFIG_UART_FOR_CONSOLE;
m_cfg->SerialIoUartDebugMode = config->SerialIoUartMode[CONFIG_UART_FOR_CONSOLE];