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-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h1
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c2
2 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 3e70c32c25..06ef898ca5 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -355,6 +355,7 @@
#define PM1_LIMIT 16
#define GPE0_LIMIT 28
+#define TOTAL_BITS(a) (8 * sizeof(a))
/* Bit definitions for MISC_MMIO_BASE register GPPClkCntrl */
#define GPP_CLK_CNTRL 0
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 91435ad42b..c46bcb44a6 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -696,7 +696,7 @@ static int get_index_bit(uint32_t value, uint16_t limit)
uint16_t i;
uint32_t t;
- if (limit >= sizeof(uint32_t))
+ if (limit >= TOTAL_BITS(uint32_t))
return -1;
/* get a mask of valid bits. Ex limit = 3, set bits 0-2 */