diff options
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/picasso/acpi/globalnvs.asl | 3 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/acpi/globalnvs.asl | 3 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/acpi/globalnvs.asl | 4 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/acpi/globalnvs.asl | 4 | ||||
| -rw-r--r-- | src/soc/intel/braswell/acpi/globalnvs.asl | 4 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/acpi/globalnvs.asl | 4 | ||||
| -rw-r--r-- | src/soc/intel/common/block/acpi/acpi/globalnvs.asl | 4 | ||||
| -rw-r--r-- | src/soc/intel/skylake/acpi/globalnvs.asl | 4 |
8 files changed, 0 insertions, 30 deletions
diff --git a/src/soc/amd/picasso/acpi/globalnvs.asl b/src/soc/amd/picasso/acpi/globalnvs.asl index 4b0e774755..9d3f381f97 100644 --- a/src/soc/amd/picasso/acpi/globalnvs.asl +++ b/src/soc/amd/picasso/acpi/globalnvs.asl @@ -21,7 +21,4 @@ Field (GNVS, ByteAcc, NoLock, Preserve) TMPS, 8, // 0x17 - Temperature Sensor ID TCRT, 8, // 0x18 - Critical Threshold TPSV, 8, // 0x19 - Passive Threshold - /* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */ - Offset (0x100), - #include <vendorcode/google/chromeos/acpi/gnvs.asl> } diff --git a/src/soc/amd/stoneyridge/acpi/globalnvs.asl b/src/soc/amd/stoneyridge/acpi/globalnvs.asl index 252ceda911..7a48dd57f8 100644 --- a/src/soc/amd/stoneyridge/acpi/globalnvs.asl +++ b/src/soc/amd/stoneyridge/acpi/globalnvs.asl @@ -42,7 +42,4 @@ Field (GNVS, ByteAcc, NoLock, Preserve) FW01, 32, // 0x28 - xHCI FW RAM addr, boot RAM FW03, 32, // 0x2c - xHCI FW RAM addr, Instruction RAM EH10, 32, // 0x30 - EHCI BAR - /* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */ - Offset (0x100), - #include <vendorcode/google/chromeos/acpi/gnvs.asl> } diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl index 07853defe3..b79a446297 100644 --- a/src/soc/intel/apollolake/acpi/globalnvs.asl +++ b/src/soc/intel/apollolake/acpi/globalnvs.asl @@ -28,8 +28,4 @@ Field (GNVS, ByteAcc, NoLock, Preserve) ELNG, 64, // 0x35 - 0x3C EPC Length A4GB, 64, // 0x3D - 0x44 Base of above 4GB MMIO Resource A4GS, 64, // 0x45 - 0x4C Length of above 4GB MMIO Resource - - /* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */ - Offset (0x100), - #include <vendorcode/google/chromeos/acpi/gnvs.asl> } diff --git a/src/soc/intel/baytrail/acpi/globalnvs.asl b/src/soc/intel/baytrail/acpi/globalnvs.asl index eb51cada51..97530cb14c 100644 --- a/src/soc/intel/baytrail/acpi/globalnvs.asl +++ b/src/soc/intel/baytrail/acpi/globalnvs.asl @@ -42,10 +42,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve) CMEM, 32, /* 0x30 - CBMEM TOC */ TOLM, 32, /* 0x34 - Top of Low Memory */ CBMC, 32, /* 0x38 - coreboot mem console pointer */ - - /* ChromeOS specific */ - Offset (0x100), - #include <vendorcode/google/chromeos/acpi/gnvs.asl> } /* Set flag to enable USB charging in S3 */ diff --git a/src/soc/intel/braswell/acpi/globalnvs.asl b/src/soc/intel/braswell/acpi/globalnvs.asl index 628a79190a..0714f23e39 100644 --- a/src/soc/intel/braswell/acpi/globalnvs.asl +++ b/src/soc/intel/braswell/acpi/globalnvs.asl @@ -44,10 +44,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve) CMEM, 32, /* 0x30 - CBMEM TOC */ TOLM, 32, /* 0x34 - Top of Low Memory */ CBMC, 32, /* 0x38 - coreboot mem console pointer */ - - /* ChromeOS specific */ - Offset (0x100), - #include <vendorcode/google/chromeos/acpi/gnvs.asl> } /* Set flag to enable USB charging in S3 */ diff --git a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl index 60d5737165..1911636f8d 100644 --- a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl +++ b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl @@ -34,10 +34,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve) CBMC, 32, // 0x1c - 0x1f - coreboot Memory Console PM1I, 64, // 0x20 - 0x27 - PM1 wake status bit GPEI, 64, // 0x28 - 0x2f - GPE wake status bit - - /* ChromeOS specific */ - Offset (0x100), - #include <vendorcode/google/chromeos/acpi/gnvs.asl> } /* Set flag to enable USB charging in S3 */ diff --git a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl index d508544cb0..18852d4bd1 100644 --- a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl +++ b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl @@ -26,8 +26,4 @@ Field (GNVS, ByteAcc, NoLock, Preserve) UIOR, 8, // 0x2f - UART debug controller init on S3 resume A4GB, 64, // 0x30 - 0x37 Base of above 4GB MMIO Resource A4GS, 64, // 0x38 - 0x3f Length of above 4GB MMIO Resource - - /* ChromeOS specific */ - Offset (0x100), - #include <vendorcode/google/chromeos/acpi/gnvs.asl> } diff --git a/src/soc/intel/skylake/acpi/globalnvs.asl b/src/soc/intel/skylake/acpi/globalnvs.asl index 45c784e18d..cc7cc9c990 100644 --- a/src/soc/intel/skylake/acpi/globalnvs.asl +++ b/src/soc/intel/skylake/acpi/globalnvs.asl @@ -46,10 +46,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve) ELNG, 64, // 0x4C - 0x53 EPC Length A4GB, 64, // 0x54 - 0x5B Base of above 4GB MMIO Resource A4GS, 64, // 0x5C - 0x63 Length of above 4GB MMIO Resource - - /* ChromeOS specific */ - Offset (0x100), - #include <vendorcode/google/chromeos/acpi/gnvs.asl> } /* Set flag to enable USB charging in S3 */ |