diff options
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/apollolake/Kconfig | 10 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 5 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/Kconfig | 14 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/Makefile.inc | 6 | ||||
| -rw-r--r-- | src/soc/intel/skylake/Kconfig | 14 | ||||
| -rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 1 |
6 files changed, 38 insertions, 12 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index fbc81ceeff..81709422d0 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -202,6 +202,16 @@ config VERSTAGE_ADDR help The base address (in CAR) where verstage should be linked +config FSP_HEADER_PATH + string + default "src/vendorcode/intel/fsp/fsp2_0/glk" if SOC_INTEL_GLK + default "3rdparty/fsp/ApolloLakeFspBinPkg/Include/" + +config FSP_FD_PATH + string + depends on FSP_USE_REPO + default "3rdparty/fsp/ApolloLakeFspBinPkg/FspBin/Fsp.fd" + config FSP_M_ADDR hex default 0xfef40000 diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 08a5037683..632cb99a3b 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -100,11 +100,6 @@ ramstage-y += gpio_apl.c endif CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include -ifeq ($(CONFIG_SOC_INTEL_GLK),y) -CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/glk -else -CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/apollolake -endif # Since FSP-M runs in CAR we need to relocate it to a specific address $(CONFIG_FSP_M_CBFS)-options := -b $(CONFIG_FSP_M_ADDR) diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 256cf1b6c7..cca783ff21 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -230,6 +230,10 @@ config C_ENV_BOOTBLOCK_SIZE hex default 0x8000 +config CBFS_SIZE + hex + default 0x200000 + choice prompt "Cache-as-ram implementation" default USE_CANNONLAKE_CAR_NEM_ENHANCED if MAINBOARD_HAS_CHROMEOS @@ -257,4 +261,14 @@ config USE_CANNONLAKE_FSP_CAR endchoice +config FSP_HEADER_PATH + string + default "src/vendorcode/intel/fsp/fsp2_0/cannonlake/" if !SOC_INTEL_COFFEELAKE + default "3rdparty/fsp/CoffeeLakeFspBinPkg/Include/" if SOC_INTEL_COFFEELAKE + +config FSP_FD_PATH + string + depends on FSP_USE_REPO + default "3rdparty/fsp/CoffeeLakeFspBinPkg/Fsp.fd" if SOC_INTEL_COFFEELAKE + endif diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 0e4c805dca..f49add01e0 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -77,12 +77,6 @@ verstage-y += pmutil.c verstage-y += spi.c verstage-$(CONFIG_UART_DEBUG) += uart.c -ifeq ($(CONFIG_SOC_INTEL_COFFEELAKE),y) -CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/coffeelake -else -CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake -endif - CPPFLAGS_common += -I$(src)/soc/intel/cannonlake CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index e368dec644..f7a46bef8d 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -302,6 +302,20 @@ config USE_SKYLAKE_FSP_CAR endchoice +config FSP_HEADER_PATH + string + depends on MAINBOARD_USES_FSP2_0 + # Use KabylakeFsp for both Skylake and Kabylake as it supports both. + # SkylakeFsp is FSP 1.1 and therefore incompatible. + default "3rdparty/fsp/KabylakeFspBinPkg/Include/" if SOC_INTEL_SKYLAKE + default "3rdparty/fsp/KabylakeFspBinPkg/Include/" if SOC_INTEL_KABYLAKE + +config FSP_FD_PATH + string + depends on FSP_USE_REPO + default "3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" if SOC_INTEL_SKYLAKE + default "3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" if SOC_INTEL_KABYLAKE + config SKIP_FSP_CAR bool "Skip cache as RAM setup in FSP" default y diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 6c8095ae9d..21dc5a4746 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -102,7 +102,6 @@ CPPFLAGS_common += -I$(src)/soc/intel/skylake/include/fsp11 CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/skylake else CPPFLAGS_common += -I$(src)/soc/intel/skylake/include/fsp20 -CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/skykabylake endif # Currently used for microcode path. |