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-rw-r--r--src/soc/amd/common/block/pi/def_callouts.c2
-rw-r--r--src/soc/amd/common/block/s3/s3_resume.c4
-rw-r--r--src/soc/amd/common/block/spi/fch_spi_flash.c2
-rw-r--r--src/soc/amd/common/block/spi/fch_spi_special.c2
-rw-r--r--src/soc/intel/braswell/southcluster.c2
-rw-r--r--src/soc/intel/common/mma.c2
-rw-r--r--src/soc/intel/denverton_ns/hob_mem.c2
-rw-r--r--src/soc/intel/quark/bootblock/bootblock.c2
-rw-r--r--src/soc/intel/quark/i2c.c2
-rw-r--r--src/soc/intel/quark/romstage/debug.c2
-rw-r--r--src/soc/intel/quark/romstage/fsp_params.c6
-rw-r--r--src/soc/qualcomm/ipq40xx/qup.c2
-rw-r--r--src/soc/qualcomm/qcs405/qup.c2
13 files changed, 16 insertions, 16 deletions
diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c
index 299a98abe9..facd5f8c0f 100644
--- a/src/soc/amd/common/block/pi/def_callouts.c
+++ b/src/soc/amd/common/block/pi/def_callouts.c
@@ -198,7 +198,7 @@ static void callout_ap_entry(void *unused)
{
AGESA_STATUS Status = AGESA_UNSUPPORTED;
- printk(BIOS_DEBUG, "%s Func: 0x%x, Data: 0x%lx, Ptr: 0x%p\n",
+ printk(BIOS_DEBUG, "%s Func: 0x%x, Data: 0x%lx, Ptr: %p\n",
__func__, agesadata.Func, agesadata.Data, agesadata.ConfigPtr);
/* Check if this AP should run the function */
diff --git a/src/soc/amd/common/block/s3/s3_resume.c b/src/soc/amd/common/block/s3/s3_resume.c
index 598036acf2..a0de406d38 100644
--- a/src/soc/amd/common/block/s3/s3_resume.c
+++ b/src/soc/amd/common/block/s3/s3_resume.c
@@ -58,7 +58,7 @@ AGESA_STATUS OemInitResume(S3_DATA_BLOCK *dataBlock)
dataBlock->NvStorage = base;
dataBlock->NvStorageSize = size;
- printk(BIOS_SPEW, "S3 NV data @0x%p, 0x%0zx bytes\n",
+ printk(BIOS_SPEW, "S3 NV data @%p, 0x%0zx bytes\n",
dataBlock->NvStorage, (size_t)dataBlock->NvStorageSize);
return AGESA_SUCCESS;
@@ -77,7 +77,7 @@ AGESA_STATUS OemS3LateRestore(S3_DATA_BLOCK *dataBlock)
dataBlock->VolatileStorage = base;
dataBlock->VolatileStorageSize = size;
- printk(BIOS_SPEW, "S3 volatile data @0x%p, 0x%0zx bytes\n",
+ printk(BIOS_SPEW, "S3 volatile data @%p, 0x%0zx bytes\n",
dataBlock->VolatileStorage, (size_t)dataBlock->VolatileStorageSize);
return AGESA_SUCCESS;
diff --git a/src/soc/amd/common/block/spi/fch_spi_flash.c b/src/soc/amd/common/block/spi/fch_spi_flash.c
index 40dd0e2996..72bc5d6ea5 100644
--- a/src/soc/amd/common/block/spi/fch_spi_flash.c
+++ b/src/soc/amd/common/block/spi/fch_spi_flash.c
@@ -200,7 +200,7 @@ static int fch_spi_flash_write(const struct spi_flash *flash, uint32_t offset, s
cmd[2] = (offset >> 8) & 0xff;
cmd[3] = offset & 0xff;
#if CONFIG(SOC_AMD_COMMON_BLOCK_SPI_DEBUG)
- printk(BIOS_DEBUG, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu"
+ printk(BIOS_DEBUG, "PP: %p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu"
"\n", buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
#endif
diff --git a/src/soc/amd/common/block/spi/fch_spi_special.c b/src/soc/amd/common/block/spi/fch_spi_special.c
index fa3c00ac84..27bea05143 100644
--- a/src/soc/amd/common/block/spi/fch_spi_special.c
+++ b/src/soc/amd/common/block/spi/fch_spi_special.c
@@ -56,7 +56,7 @@ int non_standard_sst_write_aai(u32 offset, size_t len, const void *buf, size_t s
for (actual = start; actual < len - 1; actual += 2) {
#if CONFIG(SOC_AMD_COMMON_BLOCK_SPI_DEBUG)
- printk(BIOS_DEBUG, "PP: 0x%p => cmd = { 0x%02x 0x%06lx }"
+ printk(BIOS_DEBUG, "PP: %p => cmd = { 0x%02x 0x%06lx }"
" chunk_len = 2\n",
buf + actual, cmd[0], (offset + actual));
#endif
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 8b13fd0e82..b2d13d5642 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -618,7 +618,7 @@ static void finalize_chipset(void *unused)
uint8_t *spi = (uint8_t *)SPI_BASE_ADDRESS;
struct vscc_config cfg;
- printk(BIOS_SPEW, "%s/%s (0x%p)\n",
+ printk(BIOS_SPEW, "%s/%s (%p)\n",
__FILE__, __func__, unused);
/* Set the lock enable on the BIOS control register. */
diff --git a/src/soc/intel/common/mma.c b/src/soc/intel/common/mma.c
index 1b3a82a088..2cd35ea6cd 100644
--- a/src/soc/intel/common/mma.c
+++ b/src/soc/intel/common/mma.c
@@ -219,7 +219,7 @@ static void save_mma_results_data(void *unused)
memset(mma_data, 0, mma_data_size);
printk(BIOS_DEBUG,
- "MMA: copy MMA data to CBMEM(src 0x%p, dest 0x%p, %u bytes)\n",
+ "MMA: copy MMA data to CBMEM(src %p, dest %p, %u bytes)\n",
mma_hob, mma_data, mma_hob_size);
mma_data->mma_signature = MMA_DATA_SIGNATURE;
diff --git a/src/soc/intel/denverton_ns/hob_mem.c b/src/soc/intel/denverton_ns/hob_mem.c
index e4aa78f291..a00a4f498c 100644
--- a/src/soc/intel/denverton_ns/hob_mem.c
+++ b/src/soc/intel/denverton_ns/hob_mem.c
@@ -52,7 +52,7 @@ void soc_save_dimm_info(void)
* table 17
*/
mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info));
- printk(BIOS_DEBUG, "CBMEM entry for DIMM info: 0x%p\n", mem_info);
+ printk(BIOS_DEBUG, "CBMEM entry for DIMM info: %p\n", mem_info);
if (mem_info == NULL)
return;
memset(mem_info, 0, sizeof(*mem_info));
diff --git a/src/soc/intel/quark/bootblock/bootblock.c b/src/soc/intel/quark/bootblock/bootblock.c
index 2b2fc29f59..957b4a0c37 100644
--- a/src/soc/intel/quark/bootblock/bootblock.c
+++ b/src/soc/intel/quark/bootblock/bootblock.c
@@ -118,6 +118,6 @@ void bootblock_soc_init(void)
void platform_prog_run(struct prog *prog)
{
/* Display the program entry point */
- printk(BIOS_SPEW, "Calling %s, 0x%p(0x%p)\n", prog->name,
+ printk(BIOS_SPEW, "Calling %s, %p(%p)\n", prog->name,
prog->entry, prog->arg);
}
diff --git a/src/soc/intel/quark/i2c.c b/src/soc/intel/quark/i2c.c
index b09852bc3f..7ff2ddf93f 100644
--- a/src/soc/intel/quark/i2c.c
+++ b/src/soc/intel/quark/i2c.c
@@ -209,7 +209,7 @@ int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segment,
if (index == 0)
printk(BIOS_ERR, "I2C Start\n");
printk(BIOS_ERR,
- "I2C segment[%d]: %s 0x%02x %s 0x%p, 0x%08x bytes\n",
+ "I2C segment[%d]: %s 0x%02x %s %p, 0x%08x bytes\n",
index,
(segment[index].flags & I2C_M_RD) ? "Read from" : "Write to",
segment[index].slave,
diff --git a/src/soc/intel/quark/romstage/debug.c b/src/soc/intel/quark/romstage/debug.c
index 1029eadb93..e0cf6c8262 100644
--- a/src/soc/intel/quark/romstage/debug.c
+++ b/src/soc/intel/quark/romstage/debug.c
@@ -26,7 +26,7 @@ void soc_display_fspm_upd_params(const FSPM_UPD *fspm_old_upd,
new = &fspm_new_upd->FspmConfig;
/* Display the parameters for MemoryInit */
- printk(BIOS_SPEW, "UPD values for MemoryInit at: 0x%p\n", new);
+ printk(BIOS_SPEW, "UPD values for MemoryInit at: %p\n", new);
fsp_display_upd_value("AddrMode", sizeof(old->AddrMode),
old->AddrMode, new->AddrMode);
fsp_display_upd_value("ChanMask", sizeof(old->ChanMask),
diff --git a/src/soc/intel/quark/romstage/fsp_params.c b/src/soc/intel/quark/romstage/fsp_params.c
index 681e126a13..c31cafb14f 100644
--- a/src/soc/intel/quark/romstage/fsp_params.c
+++ b/src/soc/intel/quark/romstage/fsp_params.c
@@ -111,13 +111,13 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd, uint32_t version)
"+-------------------+ 0x%08x (CONFIG_FSP_ESRAM_LOC)\n",
CONFIG_FSP_ESRAM_LOC);
printk(BIOS_SPEW, "| FSP stack |\n");
- printk(BIOS_SPEW, "+-------------------+ 0x%p\n",
+ printk(BIOS_SPEW, "+-------------------+ %p\n",
aupd->StackBase);
printk(BIOS_SPEW, "| |\n");
- printk(BIOS_SPEW, "+-------------------+ 0x%p\n",
+ printk(BIOS_SPEW, "+-------------------+ %p\n",
_car_unallocated_start);
printk(BIOS_SPEW, "| coreboot data |\n");
- printk(BIOS_SPEW, "+-------------------+ 0x%p\n",
+ printk(BIOS_SPEW, "+-------------------+ %p\n",
_ecar_stack);
printk(BIOS_SPEW, "| coreboot stack |\n");
printk(BIOS_SPEW,
diff --git a/src/soc/qualcomm/ipq40xx/qup.c b/src/soc/qualcomm/ipq40xx/qup.c
index 9a206fc6a9..1775c84628 100644
--- a/src/soc/qualcomm/ipq40xx/qup.c
+++ b/src/soc/qualcomm/ipq40xx/qup.c
@@ -47,7 +47,7 @@
#if QUP_DEBUG
#define qup_write32(a, v) do { \
write32(a, v); \
- printk(QUPDBG "%s(%d): write32(0x%p, 0x%x)\n", \
+ printk(QUPDBG "%s(%d): write32(%p, 0x%x)\n", \
__func__, __LINE__, a, v); \
} while (0)
#else
diff --git a/src/soc/qualcomm/qcs405/qup.c b/src/soc/qualcomm/qcs405/qup.c
index cff5241480..6e84bcb2ff 100644
--- a/src/soc/qualcomm/qcs405/qup.c
+++ b/src/soc/qualcomm/qcs405/qup.c
@@ -48,7 +48,7 @@
#if QUP_DEBUG
#define qup_write32(a, v) do { \
write32(a, v); \
- printk(QUPDBG "%s(%d): write32(0x%p, 0x%x)\n", \
+ printk(QUPDBG "%s(%d): write32(%p, 0x%x)\n", \
__func__, __LINE__, a, v); \
} while (0)
#else
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 20:03:16 +0000