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-rw-r--r--src/soc/amd/stoneyridge/include/soc/northbridge.h4
-rw-r--r--src/soc/amd/stoneyridge/northbridge.c6
2 files changed, 7 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/northbridge.h b/src/soc/amd/stoneyridge/include/soc/northbridge.h
index 92bce98780..365a9f5eef 100644
--- a/src/soc/amd/stoneyridge/include/soc/northbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/northbridge.h
@@ -20,6 +20,10 @@
#include <arch/io.h>
#include <device/device.h>
+/* D1F1 - HDA Configuration Registers */
+#define HDA_DEV_CTRL_STATUS 0x60
+#define HDA_NO_SNOOP_EN BIT(11)
+
/* D18F0 - HT Configuration Registers */
#define D18F0_NODE_ID 0x60
#define D18F0_CPU_CNT 0x62 /* BKDG defines as a field in DWORD 0x60 */
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index a7c78e65b0..2cefb9161f 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -363,9 +363,9 @@ void fam15_finalize(void *chip_info)
/* disable No Snoop */
dev = dev_find_slot(0, HDA0_DEVFN);
- value = pci_read_config32(dev, 0x60);
- value &= ~(1 << 11);
- pci_write_config32(dev, 0x60, value);
+ value = pci_read_config32(dev, HDA_DEV_CTRL_STATUS);
+ value &= ~HDA_NO_SNOOP_EN;
+ pci_write_config32(dev, HDA_DEV_CTRL_STATUS, value);
}
void domain_read_resources(device_t dev)