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-rw-r--r--src/soc/ucb/riscv/Kconfig4
-rw-r--r--src/soc/ucb/riscv/Makefile.inc5
-rw-r--r--src/soc/ucb/riscv/ipi.c21
3 files changed, 30 insertions, 0 deletions
diff --git a/src/soc/ucb/riscv/Kconfig b/src/soc/ucb/riscv/Kconfig
index 26adb56bfe..99b049068e 100644
--- a/src/soc/ucb/riscv/Kconfig
+++ b/src/soc/ucb/riscv/Kconfig
@@ -25,4 +25,8 @@ config RISCV_CODEMODEL
string
default "medany"
+config RISCV_WORKING_HARTID
+ int
+ default 0
+
endif
diff --git a/src/soc/ucb/riscv/Makefile.inc b/src/soc/ucb/riscv/Makefile.inc
index a10f3aae4c..c96e3637b7 100644
--- a/src/soc/ucb/riscv/Makefile.inc
+++ b/src/soc/ucb/riscv/Makefile.inc
@@ -1,8 +1,13 @@
ifeq ($(CONFIG_SOC_UCB_RISCV),y)
bootblock-y += mtime.c
+bootblock-y += ipi.c
+
romstage-y += cbmem.c
+romstage-y += ipi.c
+
ramstage-y += cbmem.c
ramstage-y += mtime.c
+ramstage-y += ipi.c
endif
diff --git a/src/soc/ucb/riscv/ipi.c b/src/soc/ucb/riscv/ipi.c
new file mode 100644
index 0000000000..80307a8d2a
--- /dev/null
+++ b/src/soc/ucb/riscv/ipi.c
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 HardenedLinux
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <mcall.h>
+
+/* TODO: Please implement this function */
+void set_msip(int hartid, int val)
+{
+}