4 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/samsung/exynos5250/clock_init.c b/src/soc/samsung/exynos5250/clock_init.c
index 1c13466ba9..12fc5c6410 100644
--- a/src/soc/samsung/exynos5250/clock_init.c
+++ b/src/soc/samsung/exynos5250/clock_init.c
@@ -411,7 +411,6 @@ void clock_gate(void)
 	clrbits32(&exynos_clock->gate_ip_cdrex, CLK_DPHY0_MASK |
 						CLK_DPHY1_MASK |
 						CLK_TZASC_DRBXR_MASK);
-
 }
 
 void clock_init_dp_clock(void)
diff --git a/src/soc/samsung/exynos5250/dp-reg.c b/src/soc/samsung/exynos5250/dp-reg.c
index b93a9b8c1a..7e5494de15 100644
--- a/src/soc/samsung/exynos5250/dp-reg.c
+++ b/src/soc/samsung/exynos5250/dp-reg.c
@@ -115,7 +115,6 @@ int s5p_dp_init_analog_func(struct s5p_dp_device *dp)
 
 	/* Power up PLL */
 	if (s5p_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
-
 		clrbits32(&base->dp_pll_ctl, DP_PLL_PD);
 
 		stopwatch_init_msecs_expire(&sw, PLL_LOCK_TIMEOUT);
diff --git a/src/soc/samsung/exynos5420/dmc_init_ddr3.c b/src/soc/samsung/exynos5420/dmc_init_ddr3.c
index a187f6e090..e716d5833e 100644
--- a/src/soc/samsung/exynos5420/dmc_init_ddr3.c
+++ b/src/soc/samsung/exynos5420/dmc_init_ddr3.c
@@ -186,7 +186,6 @@ int ddr3_mem_ctrl_init(struct mem_timings *mem, int interleave_size, int reset)
 	}
 
 	if (mem->gate_leveling_enable) {
-
 		write32(&exynos_phy0_control->phy_con0, PHY_CON0_RESET_VAL);
 		write32(&exynos_phy1_control->phy_con0, PHY_CON0_RESET_VAL);
 
diff --git a/src/soc/samsung/exynos5420/dp.c b/src/soc/samsung/exynos5420/dp.c
index 13a8feff41..f28c87d5bb 100644
--- a/src/soc/samsung/exynos5420/dp.c
+++ b/src/soc/samsung/exynos5420/dp.c
@@ -142,7 +142,6 @@ static unsigned int exynos_dp_read_edid(void)
 			exynos_dp_write_byte_to_dpcd(DPCD_TEST_RESPONSE,
 				DPCD_TEST_EDID_CHECKSUM_WRITE);
 		}
-
 	}
 
 	return 0;
@@ -338,7 +337,6 @@ static unsigned int exynos_dp_enable_rx_to_enhanced_mode(unsigned char enable)
 	if (ret != EXYNOS_DP_SUCCESS) {
 		printk(BIOS_ERR, "DP write_to_dpcd failed\n");
 		return -1;
-
 	}
 
 	return ret;