diff options
Diffstat (limited to 'src/soc/samsung/exynos5420/uart.c')
| -rw-r--r-- | src/soc/samsung/exynos5420/uart.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/soc/samsung/exynos5420/uart.c b/src/soc/samsung/exynos5420/uart.c index 74e5067b0d..bfdd54a891 100644 --- a/src/soc/samsung/exynos5420/uart.c +++ b/src/soc/samsung/exynos5420/uart.c @@ -66,7 +66,7 @@ static void serial_setbrg_dev(struct s5p_uart *uart) uclk = clock_get_periph_rate(PERIPH_ID_UART3); val = uclk / default_baudrate(); - writel(val / 16 - 1, &uart->ubrdiv); + write32(&uart->ubrdiv, val / 16 - 1); /* * FIXME(dhendrix): the original uart.h had a "br_rest" value which @@ -88,12 +88,12 @@ static void serial_setbrg_dev(struct s5p_uart *uart) static void exynos5_init_dev(struct s5p_uart *uart) { /* enable FIFOs */ - writel(0x1, &uart->ufcon); - writel(0, &uart->umcon); + write32(&uart->ufcon, 0x1); + write32(&uart->umcon, 0); /* 8N1 */ - writel(0x3, &uart->ulcon); + write32(&uart->ulcon, 0x3); /* No interrupts, no DMA, pure polling */ - writel(0x245, &uart->ucon); + write32(&uart->ucon, 0x245); serial_setbrg_dev(uart); } @@ -114,7 +114,7 @@ static int exynos5_uart_err_check(struct s5p_uart *uart, int op) else mask = 0xf; - return readl(&uart->uerstat) & mask; + return read32(&uart->uerstat) & mask; } /* @@ -125,13 +125,13 @@ static int exynos5_uart_err_check(struct s5p_uart *uart, int op) static unsigned char exynos5_uart_rx_byte(struct s5p_uart *uart) { /* wait for character to arrive */ - while (!(readl(&uart->ufstat) & (RX_FIFO_COUNT_MASK | + while (!(read32(&uart->ufstat) & (RX_FIFO_COUNT_MASK | RX_FIFO_FULL_MASK))) { if (exynos5_uart_err_check(uart, 0)) return 0; } - return readb(&uart->urxh) & 0xff; + return read8(&uart->urxh) & 0xff; } /* @@ -140,12 +140,12 @@ static unsigned char exynos5_uart_rx_byte(struct s5p_uart *uart) static void exynos5_uart_tx_byte(struct s5p_uart *uart, unsigned char data) { /* wait for room in the tx FIFO */ - while ((readl(&uart->ufstat) & TX_FIFO_FULL_MASK)) { + while ((read32(&uart->ufstat) & TX_FIFO_FULL_MASK)) { if (exynos5_uart_err_check(uart, 1)) return; } - writeb(data, &uart->utxh); + write8(&uart->utxh, data); } uintptr_t uart_platform_base(int idx) |