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Diffstat (limited to 'src/soc/samsung/exynos5420/clock.c')
-rw-r--r--src/soc/samsung/exynos5420/clock.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/samsung/exynos5420/clock.c b/src/soc/samsung/exynos5420/clock.c
index 7043310a43..5bbeb04ffe 100644
--- a/src/soc/samsung/exynos5420/clock.c
+++ b/src/soc/samsung/exynos5420/clock.c
@@ -28,7 +28,7 @@
/* input clock of PLL: SMDK5420 has 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000
-/* Epll Clock division values to achive different frequency output */
+/* Epll Clock division values to achieve different frequency output */
static struct st_epll_con_val epll_div[] = {
{ 192000000, 0, 48, 3, 1, 0 },
{ 180000000, 0, 45, 3, 1, 0 },
@@ -336,7 +336,7 @@ int clock_set_dwmci(enum periph_id peripheral)
return -1;
}
- /* The SDCLKIN is divided insided controller by the DIVRATIO field in
+ /* The SDCLKIN is divided inside the controller by the DIVRATIO field in
* CLKSEL register, so we must calculate clock value as
* cclk_in = SDCLKIN / (DIVRATIO + 1)
* Currently the RIVRATIO must be 3 for MMC0 and MMC2 on Exynos5420
@@ -360,7 +360,7 @@ void clock_ll_set_pre_ratio(enum periph_id periph_id, unsigned divisor)
u32 *reg;
/*
- * For now we only handle a very small subset of peipherals here.
+ * For now we only handle a very small subset of peripherals here.
* Others will need to (and do) mangle the clock registers
* themselves, At some point it is hoped that this function can work
* from a table or calculated register offset / mask. For now this
@@ -585,7 +585,7 @@ int clock_epll_set_rate(unsigned long rate)
epll_con |= epll_div[i].s_div << EPLL_CON0_SDIV_SHIFT;
/*
- * Required period ( in cycles) to genarate a stable clock output.
+ * Required period ( in cycles) to generate a stable clock output.
* The maximum clock time can be up to 3000 * PDIV cycles of PLLs
* frequency input (as per spec)
*/
@@ -622,7 +622,7 @@ int clock_set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq)
unsigned int div ;
if ((dst_frq == 0) || (src_frq == 0)) {
- printk(BIOS_DEBUG, "%s: Invalid requency input for prescaler\n", __func__);
+ printk(BIOS_DEBUG, "%s: Invalid frequency input for prescaler\n", __func__);
printk(BIOS_DEBUG, "src frq = %d des frq = %d ", src_frq, dst_frq);
return -1;
}