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-rw-r--r--src/soc/rockchip/rk3288/clock.c6
-rw-r--r--src/soc/rockchip/rk3288/include/soc/clock.h1
2 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c
index fe42910dde..ab12e8c896 100644
--- a/src/soc/rockchip/rk3288/clock.c
+++ b/src/soc/rockchip/rk3288/clock.c
@@ -640,3 +640,9 @@ int rkclk_configure_vop_dclk(u32 vop_id, u32 dclk_hz)
}
return 0;
}
+
+int rkclk_was_watchdog_reset(void)
+{
+ /* Bits 5 and 4 are "second" and "first" global watchdog reset. */
+ return readl(&cru_ptr->cru_glb_rst_st) & 0x30;
+}
diff --git a/src/soc/rockchip/rk3288/include/soc/clock.h b/src/soc/rockchip/rk3288/include/soc/clock.h
index b8f892bbed..cbf4ba0df3 100644
--- a/src/soc/rockchip/rk3288/include/soc/clock.h
+++ b/src/soc/rockchip/rk3288/include/soc/clock.h
@@ -49,4 +49,5 @@ void rkclk_configure_tsadc(unsigned int hz);
void rkclk_configure_vop_aclk(u32 vop_id, u32 aclk_hz);
int rkclk_configure_vop_dclk(u32 vop_id, u32 dclk_hz);
void rkclk_configure_edp(void);
+int rkclk_was_watchdog_reset(void);
#endif /* __SOC_ROCKCHIP_RK3288_CLOCK_H__ */