diff options
Diffstat (limited to 'src/soc/rockchip/rk3399')
| -rw-r--r-- | src/soc/rockchip/rk3399/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/rockchip/rk3399/emmc.c | 50 | ||||
| -rw-r--r-- | src/soc/rockchip/rk3399/include/soc/emmc.h | 16 |
3 files changed, 67 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc index 9af451c08c..68f346c85e 100644 --- a/src/soc/rockchip/rk3399/Makefile.inc +++ b/src/soc/rockchip/rk3399/Makefile.inc @@ -55,6 +55,7 @@ ramstage-y += sdram.c ramstage-y += ../common/spi.c ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c ramstage-y += clock.c +ramstage-y += emmc.c ramstage-y += ../common/gpio.c ramstage-y += gpio.c ramstage-y += ../common/i2c.c diff --git a/src/soc/rockchip/rk3399/emmc.c b/src/soc/rockchip/rk3399/emmc.c new file mode 100644 index 0000000000..b8519f7796 --- /dev/null +++ b/src/soc/rockchip/rk3399/emmc.c @@ -0,0 +1,50 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/io.h> +#include <console/console.h> +#include <delay.h> +#include <soc/addressmap.h> +#include <soc/emmc.h> + +#define SDHCI_CLOCK_CONTROL 0x2c +#define SDHCI_CLOCK_CARD_EN 0x0004 +#define SDHCI_CLOCK_INT_STABLE 0x0002 +#define SDHCI_CLOCK_INT_EN 0x0001 + +/* TODO(crosbug.com/p/52873): We actually don't need to set clk for + * emmc once kernel fix it's bug. + */ +void enable_emmc_clk(void) +{ + int timeout, clk; + + write32((void *)(EMMC_BASE + SDHCI_CLOCK_CONTROL), SDHCI_CLOCK_INT_EN); + + /* Wait max 20 ms */ + timeout = 20; + while (!((clk = read32((void *)(EMMC_BASE + SDHCI_CLOCK_CONTROL))) + & SDHCI_CLOCK_INT_STABLE)) { + if (timeout == 0) { + printk(BIOS_ERR, "Internal clock never stabilised.\n"); + return; + } + timeout--; + udelay(1000); + } + + clk |= SDHCI_CLOCK_CARD_EN; + write32((void *)(EMMC_BASE + SDHCI_CLOCK_CONTROL), clk); +} diff --git a/src/soc/rockchip/rk3399/include/soc/emmc.h b/src/soc/rockchip/rk3399/include/soc/emmc.h new file mode 100644 index 0000000000..0d29d9e138 --- /dev/null +++ b/src/soc/rockchip/rk3399/include/soc/emmc.h @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +void enable_emmc_clk(void); |