aboutsummaryrefslogtreecommitdiff
path: root/src/soc/rockchip/rk3399/romstage.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/rockchip/rk3399/romstage.c')
-rw-r--r--src/soc/rockchip/rk3399/romstage.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3399/romstage.c b/src/soc/rockchip/rk3399/romstage.c
index ae0264e828..3722813d6d 100644
--- a/src/soc/rockchip/rk3399/romstage.c
+++ b/src/soc/rockchip/rk3399/romstage.c
@@ -31,6 +31,7 @@
#include <soc/tsadc.h>
#include <soc/sdram.h>
#include <symbols.h>
+#include <soc/usb.h>
static const uint64_t dram_size =
(uint64_t)min((uint64_t)CONFIG_DRAM_SIZE_MB * MiB, MAX_DRAM_ADDRESS);
@@ -72,6 +73,16 @@ static void init_dvs_outputs(void)
pwm_init(i, 3333, 1904);
}
+static void prepare_usb(void)
+{
+ /*
+ * Do dwc3 core soft reset and phy reset. Kick these resets
+ * off early so they get at least 100ms to settle.
+ */
+ reset_usb_drd0_dwc3();
+ reset_usb_drd1_dwc3();
+}
+
void main(void)
{
console_init();
@@ -81,6 +92,8 @@ void main(void)
/* Init DVS to conservative values. */
init_dvs_outputs();
+ prepare_usb();
+
sdram_init(get_sdram_config());
mmu_config_range((void *)0, (uintptr_t)dram_size, CACHED_MEM);