aboutsummaryrefslogtreecommitdiff
path: root/src/soc/rdc/r8610/bootblock.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/rdc/r8610/bootblock.c')
-rw-r--r--src/soc/rdc/r8610/bootblock.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/rdc/r8610/bootblock.c b/src/soc/rdc/r8610/bootblock.c
new file mode 100644
index 0000000000..0dc776ea93
--- /dev/null
+++ b/src/soc/rdc/r8610/bootblock.c
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Rudolf Marek <r.marek@assembler.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <device/pci_def.h>
+
+static void bootblock_southbridge_init(void)
+{
+ uint32_t tmp;
+
+ tmp = pci_read_config32(PCI_DEV(0, 7, 0), 0x40);
+ /* decode all flash ranges */
+ pci_write_config32(PCI_DEV(0, 7, 0), 0x40, tmp | 0x07ff0000);
+}