diff options
Diffstat (limited to 'src/soc/qualcomm')
28 files changed, 0 insertions, 44 deletions
diff --git a/src/soc/qualcomm/ipq40xx/gpio.c b/src/soc/qualcomm/ipq40xx/gpio.c index 2e2a8af8d8..e7874a786a 100644 --- a/src/soc/qualcomm/ipq40xx/gpio.c +++ b/src/soc/qualcomm/ipq40xx/gpio.c @@ -17,7 +17,6 @@ static inline int gpio_not_valid(gpio_t gpio) return (gpio > GPIO_MAX_NUM); } - /******************************************************* Function description: configure GPIO functinality Arguments : @@ -30,7 +29,6 @@ unsigned enable - 0 Disable, 1 - Enable. Return : None *******************************************************/ - void gpio_tlmm_config_set(gpio_t gpio, unsigned int func, unsigned int pull, unsigned int drvstr, unsigned int enable) @@ -60,7 +58,6 @@ unsigned *enable - 0 - Disable, 1- Enable. Return : None *******************************************************/ - void gpio_tlmm_config_get(gpio_t gpio, unsigned int *func, unsigned int *pull, unsigned int *drvstr, unsigned int *enable) @@ -93,7 +90,6 @@ int gpio_get(gpio_t gpio) if (gpio_not_valid(gpio)) return -1; - return (read32(GPIO_IN_OUT_ADDR(gpio)) >> GPIO_IO_IN_SHIFT) & GPIO_IO_IN_MASK; } diff --git a/src/soc/qualcomm/ipq40xx/include/soc/blsp.h b/src/soc/qualcomm/ipq40xx/include/soc/blsp.h index 7671539c1a..cbef2084a9 100644 --- a/src/soc/qualcomm/ipq40xx/include/soc/blsp.h +++ b/src/soc/qualcomm/ipq40xx/include/soc/blsp.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause */ - #ifndef __BLSP_H_ #define __BLSP_H_ diff --git a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h index 5c13581026..f3241fb5b9 100644 --- a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h +++ b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause */ - #ifndef _IPQ40XX_CDP_H_ #define _IPQ40XX_CDP_H_ diff --git a/src/soc/qualcomm/ipq40xx/include/soc/clock.h b/src/soc/qualcomm/ipq40xx/include/soc/clock.h index 6859b1f1a7..1c4c32977d 100644 --- a/src/soc/qualcomm/ipq40xx/include/soc/clock.h +++ b/src/soc/qualcomm/ipq40xx/include/soc/clock.h @@ -175,7 +175,6 @@ #define GMAC_COREn_CLCK_INV_DISABLE (0 << 5) #define GMAC_COREn_CLCK_BRANCH_ENA (1 << 4) - /* Uart specific clock settings */ void uart_pll_vote_clk_enable(unsigned int); @@ -186,5 +185,4 @@ void usb_clock_config(void); int audio_clock_config(unsigned int frequency); int blsp_i2c_clock_config(blsp_qup_id_t id); - #endif /* __PLATFORM_IPQ40XX_CLOCK_H_ */ diff --git a/src/soc/qualcomm/ipq40xx/include/soc/ipq_uart.h b/src/soc/qualcomm/ipq40xx/include/soc/ipq_uart.h index c730d2c190..feac71c7b9 100644 --- a/src/soc/qualcomm/ipq40xx/include/soc/ipq_uart.h +++ b/src/soc/qualcomm/ipq40xx/include/soc/ipq_uart.h @@ -10,7 +10,6 @@ extern void __udelay(unsigned long usec); - enum MSM_BOOT_UART_DM_PARITY_MODE { MSM_BOOT_UART_DM_NO_PARITY, MSM_BOOT_UART_DM_ODD_PARITY, diff --git a/src/soc/qualcomm/ipq40xx/include/soc/spi.h b/src/soc/qualcomm/ipq40xx/include/soc/spi.h index 9fcc15fae2..0ccc5caabb 100644 --- a/src/soc/qualcomm/ipq40xx/include/soc/spi.h +++ b/src/soc/qualcomm/ipq40xx/include/soc/spi.h @@ -134,7 +134,6 @@ struct blsp_spi { void *qup_deassert_wait; }; - #define SUCCESS 0 #define DUMMY_DATA_VAL 0 @@ -148,7 +147,6 @@ struct blsp_spi { * (count function disabled) and does not hold significance in the count. */ #define MAX_PACKET_COUNT ((64 * KiB) - 1) - struct ipq_spi_slave { struct spi_slave slave; const struct blsp_spi *regs; diff --git a/src/soc/qualcomm/ipq40xx/usb.c b/src/soc/qualcomm/ipq40xx/usb.c index 7707c50fba..b3c0813fbb 100644 --- a/src/soc/qualcomm/ipq40xx/usb.c +++ b/src/soc/qualcomm/ipq40xx/usb.c @@ -44,14 +44,12 @@ #define DWC3_GSNPSID 0xc120 #define DWC3_DCTL 0xc704 - /* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) #define DWC3_GSNPSID_MASK 0xffff0000 #define DWC3_GEVTEN 0xc114 - #define DWC3_GCTL_SCALEDOWN(n) ((n) << 4) #define DWC3_GCTL_SCALEDOWN_MASK DWC3_GCTL_SCALEDOWN(3) #define DWC3_GCTL_DISSCRAMBLE (1 << 3) diff --git a/src/soc/qualcomm/ipq806x/gpio.c b/src/soc/qualcomm/ipq806x/gpio.c index 2e2a8af8d8..e7874a786a 100644 --- a/src/soc/qualcomm/ipq806x/gpio.c +++ b/src/soc/qualcomm/ipq806x/gpio.c @@ -17,7 +17,6 @@ static inline int gpio_not_valid(gpio_t gpio) return (gpio > GPIO_MAX_NUM); } - /******************************************************* Function description: configure GPIO functinality Arguments : @@ -30,7 +29,6 @@ unsigned enable - 0 Disable, 1 - Enable. Return : None *******************************************************/ - void gpio_tlmm_config_set(gpio_t gpio, unsigned int func, unsigned int pull, unsigned int drvstr, unsigned int enable) @@ -60,7 +58,6 @@ unsigned *enable - 0 - Disable, 1- Enable. Return : None *******************************************************/ - void gpio_tlmm_config_get(gpio_t gpio, unsigned int *func, unsigned int *pull, unsigned int *drvstr, unsigned int *enable) @@ -93,7 +90,6 @@ int gpio_get(gpio_t gpio) if (gpio_not_valid(gpio)) return -1; - return (read32(GPIO_IN_OUT_ADDR(gpio)) >> GPIO_IO_IN_SHIFT) & GPIO_IO_IN_MASK; } diff --git a/src/soc/qualcomm/ipq806x/include/soc/clock.h b/src/soc/qualcomm/ipq806x/include/soc/clock.h index d7cb3c484d..79a5a2dd89 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/clock.h +++ b/src/soc/qualcomm/ipq806x/include/soc/clock.h @@ -156,7 +156,6 @@ #define GMAC_COREn_CLCK_INV_DISABLE (0 << 5) #define GMAC_COREn_CLCK_BRANCH_ENA (1 << 4) - /* Uart specific clock settings */ void uart_pll_vote_clk_enable(unsigned int); diff --git a/src/soc/qualcomm/ipq806x/include/soc/gsbi.h b/src/soc/qualcomm/ipq806x/include/soc/gsbi.h index 29a56e73ca..323b47d449 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/gsbi.h +++ b/src/soc/qualcomm/ipq806x/include/soc/gsbi.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: ISC */ - #ifndef __GSBI_H_ #define __GSBI_H_ diff --git a/src/soc/qualcomm/ipq806x/include/soc/iomap.h b/src/soc/qualcomm/ipq806x/include/soc/iomap.h index e9e3e04995..98a891141c 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/iomap.h +++ b/src/soc/qualcomm/ipq806x/include/soc/iomap.h @@ -122,7 +122,6 @@ #define GSBI_QUP_APPS_PRE_DIV_SFT 3 #define GSBI_QUP_APPS_SRC_SEL_MSK 0x7 - #define GSBI_QUP_APSS_MD_REG(gsbi_n) ((MSM_CLK_CTL_BASE + 0x29c8) + \ (32*(gsbi_n-1))) #define GSBI_QUP_APSS_NS_REG(gsbi_n) ((MSM_CLK_CTL_BASE + 0x29cc) + \ diff --git a/src/soc/qualcomm/ipq806x/include/soc/ipq_uart.h b/src/soc/qualcomm/ipq806x/include/soc/ipq_uart.h index ef499197b7..5903652d25 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/ipq_uart.h +++ b/src/soc/qualcomm/ipq806x/include/soc/ipq_uart.h @@ -11,7 +11,6 @@ extern void __udelay(unsigned long usec); - enum MSM_BOOT_UART_DM_PARITY_MODE { MSM_BOOT_UART_DM_NO_PARITY, MSM_BOOT_UART_DM_ODD_PARITY, diff --git a/src/soc/qualcomm/ipq806x/spi.c b/src/soc/qualcomm/ipq806x/spi.c index d65f0fd381..2b18bda608 100644 --- a/src/soc/qualcomm/ipq806x/spi.c +++ b/src/soc/qualcomm/ipq806x/spi.c @@ -32,7 +32,6 @@ #define GSBI_IDX_TO_GSBI(idx) (idx + 5) - /* MX_INPUT_COUNT and MX_OUTPUT_COUNT are 16-bits. Zero has a special meaning * (count function disabled) and does not hold significance in the count. */ #define MAX_PACKET_COUNT ((64 * KiB) - 1) @@ -141,7 +140,6 @@ static unsigned int qup_apps_clk_state[NUM_PORTS] = { GSBI7_QUP_APPS_CLK }; - static int check_bit_state(uint32_t reg_addr, int bit_num, int val, int us_delay) { unsigned int count = TIMEOUT_CNT; diff --git a/src/soc/qualcomm/qcs405/include/soc/addressmap.h b/src/soc/qualcomm/qcs405/include/soc/addressmap.h index 1d46071b21..b21ae26b71 100644 --- a/src/soc/qualcomm/qcs405/include/soc/addressmap.h +++ b/src/soc/qualcomm/qcs405/include/soc/addressmap.h @@ -3,7 +3,6 @@ #ifndef __SOC_QUALCOMM_QCS405_ADDRESS_MAP_H__ #define __SOC_QUALCOMM_QCS405_ADDRESS_MAP_H__ - #define QSPI_BASE 0x88DF000 #define TLMM_EAST_TILE_BASE 0x7B00000 #define TLMM_NORTH_TILE_BASE 0x1300000 diff --git a/src/soc/qualcomm/qcs405/include/soc/blsp.h b/src/soc/qualcomm/qcs405/include/soc/blsp.h index 7671539c1a..cbef2084a9 100644 --- a/src/soc/qualcomm/qcs405/include/soc/blsp.h +++ b/src/soc/qualcomm/qcs405/include/soc/blsp.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause */ - #ifndef __BLSP_H_ #define __BLSP_H_ diff --git a/src/soc/qualcomm/qcs405/include/soc/cdp.h b/src/soc/qualcomm/qcs405/include/soc/cdp.h index 8c25631dbd..7c4286049e 100644 --- a/src/soc/qualcomm/qcs405/include/soc/cdp.h +++ b/src/soc/qualcomm/qcs405/include/soc/cdp.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause */ - #ifndef _QCS405_CDP_H_ #define _QCS405_CDP_H_ diff --git a/src/soc/qualcomm/qcs405/include/soc/gpio.h b/src/soc/qualcomm/qcs405/include/soc/gpio.h index 86be1b0cc1..18f77816de 100644 --- a/src/soc/qualcomm/qcs405/include/soc/gpio.h +++ b/src/soc/qualcomm/qcs405/include/soc/gpio.h @@ -17,7 +17,6 @@ typedef struct { #define TLMM_GPIO_IN_OUT_OFF 0x4 #define TLMM_GPIO_ID_STATUS_OFF 0x10 - /* GPIO INTR CFG MASK */ #define GPIO_INTR_DECT_CTL_MASK 0x3 #define GPIO_INTR_RAW_STATUS_EN_MASK 0x1 diff --git a/src/soc/qualcomm/qcs405/include/soc/qup.h b/src/soc/qualcomm/qcs405/include/soc/qup.h index f758a22d05..d0959c6fac 100644 --- a/src/soc/qualcomm/qcs405/include/soc/qup.h +++ b/src/soc/qualcomm/qcs405/include/soc/qup.h @@ -3,7 +3,6 @@ #ifndef __QUP_H__ #define __QUP_H__ - /* QUP block registers */ #define QUP_CONFIG 0x000 #define QUP_STATE 0x004 diff --git a/src/soc/qualcomm/qcs405/include/soc/spi.h b/src/soc/qualcomm/qcs405/include/soc/spi.h index cfd98ad969..4fe647453a 100644 --- a/src/soc/qualcomm/qcs405/include/soc/spi.h +++ b/src/soc/qualcomm/qcs405/include/soc/spi.h @@ -155,7 +155,6 @@ struct blsp_spi { void *qup_deassert_wait; }; - #define SUCCESS 0 #define DUMMY_DATA_VAL 0 @@ -169,7 +168,6 @@ struct blsp_spi { * (count function disabled) and does not hold significance in the count. */ #define MAX_PACKET_COUNT ((64 * KiB) - 1) - struct qcs_spi_slave { struct spi_slave slave; const struct blsp_spi *regs; diff --git a/src/soc/qualcomm/qcs405/include/soc/uart.h b/src/soc/qualcomm/qcs405/include/soc/uart.h index e3f0cfd5ee..c222add717 100644 --- a/src/soc/qualcomm/qcs405/include/soc/uart.h +++ b/src/soc/qualcomm/qcs405/include/soc/uart.h @@ -10,7 +10,6 @@ extern void __udelay(unsigned long usec); - enum MSM_BOOT_UART_DM_PARITY_MODE { MSM_BOOT_UART_DM_NO_PARITY, MSM_BOOT_UART_DM_ODD_PARITY, diff --git a/src/soc/qualcomm/qcs405/qup.c b/src/soc/qualcomm/qcs405/qup.c index 3ba4ba6874..316cd9fed0 100644 --- a/src/soc/qualcomm/qcs405/qup.c +++ b/src/soc/qualcomm/qcs405/qup.c @@ -60,7 +60,6 @@ static void i2c_set_mstr_clk_ctl(unsigned int id, unsigned int hz) qup_write32(QUP_ADDR(id, QUP_I2C_MASTER_CLK_CTL), mstr_clk_ctl); } - static qup_return_t qup_i2c_master_status(blsp_qup_id_t id) { uint32_t reg_val = read32(QUP_ADDR(id, QUP_I2C_MASTER_STATUS)); diff --git a/src/soc/qualcomm/qcs405/uart.c b/src/soc/qualcomm/qcs405/uart.c index ac72998cb6..97f9e76520 100644 --- a/src/soc/qualcomm/qcs405/uart.c +++ b/src/soc/qualcomm/qcs405/uart.c @@ -89,7 +89,6 @@ static int valid_data = 0; /* Received data */ static unsigned int word = 0; - void uart_tx_byte(unsigned int idx, unsigned char data) { int num_of_chars = 1; diff --git a/src/soc/qualcomm/qcs405/usb.c b/src/soc/qualcomm/qcs405/usb.c index 738e56fb05..19d1e0e3e7 100644 --- a/src/soc/qualcomm/qcs405/usb.c +++ b/src/soc/qualcomm/qcs405/usb.c @@ -197,7 +197,6 @@ void setup_usb_host(enum usb_port port, struct usb_board_data *board_data) /* Clear core reset. */ clock_reset_bcr(dwc3->usb3_bcr, 0); - if (port == HSUSB_SS_PORT_0) { /* Set PHY reset. */ setbits32(&dwc3->usb2_phy_bcr, BIT(1)); diff --git a/src/soc/qualcomm/sc7180/include/soc/addressmap.h b/src/soc/qualcomm/sc7180/include/soc/addressmap.h index 29c60db56a..832ef42968 100644 --- a/src/soc/qualcomm/sc7180/include/soc/addressmap.h +++ b/src/soc/qualcomm/sc7180/include/soc/addressmap.h @@ -3,7 +3,6 @@ #ifndef _SOC_QUALCOMM_SC7180_ADDRESS_MAP_H_ #define _SOC_QUALCOMM_SC7180_ADDRESS_MAP_H_ - #define AOSS_CC_BASE 0x0C2A0000 #define GCC_BASE 0x00100000 #define QSPI_BASE 0x088DC000 diff --git a/src/soc/qualcomm/sc7180/include/soc/usb.h b/src/soc/qualcomm/sc7180/include/soc/usb.h index 6f7c16843c..f3bc89ad9b 100644 --- a/src/soc/qualcomm/sc7180/include/soc/usb.h +++ b/src/soc/qualcomm/sc7180/include/soc/usb.h @@ -79,5 +79,4 @@ void setup_usb_host0(struct usb_board_data *data); /* Call reset_ before setup_ */ void reset_usb0(void); - #endif /* _SC7180_USB_H_ */ diff --git a/src/soc/qualcomm/sc7180/qupv3_config.c b/src/soc/qualcomm/sc7180/qupv3_config.c index 3dbe3e67cb..342ee1f7fa 100644 --- a/src/soc/qualcomm/sc7180/qupv3_config.c +++ b/src/soc/qualcomm/sc7180/qupv3_config.c @@ -52,7 +52,6 @@ void qupv3_se_fw_load_and_init(unsigned int bus, unsigned int protocol, clrbits_le32(®s->geni_cgc_ctrl, GENI_CGC_CTRL_PROG_RAM_SCLK_OFF_BMSK | GENI_CGC_CTRL_PROG_RAM_HCLK_OFF_BMSK); - /* HPG section 3.1.7.1 */ if (protocol != SE_PROTOCOL_UART) { setbits_le32(®s->geni_dfs_if_cfg, diff --git a/src/soc/qualcomm/sc7180/usb.c b/src/soc/qualcomm/sc7180/usb.c index 41032b79da..370fa66911 100644 --- a/src/soc/qualcomm/sc7180/usb.c +++ b/src/soc/qualcomm/sc7180/usb.c @@ -290,8 +290,6 @@ static struct usb3_phy_qserdes_rx_reg_layout *const qserdes_rx_reg_layout = static struct usb3_phy_pcs_reg_layout *const pcs_reg_layout = (void *)QMP_PHY_PCS_REG_BASE; - - struct usb_dwc3 { u32 sbuscfg0; u32 sbuscfg1; @@ -436,8 +434,6 @@ static const struct qmp_phy_init_tbl qmp_v3_usb3_pcs_tbl[] = { {&pcs_reg_layout->pcs_rxeqtraining_run_time, 0x13}, }; - - struct usb_dwc3_cfg { struct usb_dwc3 *usb_host_dwc3; struct usb_qusb_phy_pll *qusb_phy_pll; @@ -481,7 +477,6 @@ static struct usb_dwc3_cfg usb_port0 = { .efuse_offset = 25, }; - static struct qfprom_corr * const qfprom_corr_efuse = (void *)QFPROM_BASE; static void reset_usb(struct usb_dwc3_cfg *dwc3) @@ -505,7 +500,6 @@ void reset_usb0(void) reset_usb(&usb_port0); } - /* * Update board specific PHY tuning override values that specified from * board file. diff --git a/src/soc/qualcomm/sdm845/include/soc/addressmap.h b/src/soc/qualcomm/sdm845/include/soc/addressmap.h index ba6bc8cd29..aa80a1439e 100644 --- a/src/soc/qualcomm/sdm845/include/soc/addressmap.h +++ b/src/soc/qualcomm/sdm845/include/soc/addressmap.h @@ -3,7 +3,6 @@ #ifndef __SOC_QUALCOMM_SDM845_ADDRESS_MAP_H__ #define __SOC_QUALCOMM_SDM845_ADDRESS_MAP_H__ - #define QSPI_BASE 0x88DF000 #define TLMM_EAST_TILE_BASE 0x03500000 #define TLMM_NORTH_TILE_BASE 0x03900000 |