diff options
Diffstat (limited to 'src/soc/qualcomm/sc7280')
| -rw-r--r-- | src/soc/qualcomm/sc7280/bootblock.c | 7 | ||||
| -rw-r--r-- | src/soc/qualcomm/sc7280/clock.c | 10 |
2 files changed, 1 insertions, 16 deletions
diff --git a/src/soc/qualcomm/sc7280/bootblock.c b/src/soc/qualcomm/sc7280/bootblock.c index 0926127baf..bdabea1fbb 100644 --- a/src/soc/qualcomm/sc7280/bootblock.c +++ b/src/soc/qualcomm/sc7280/bootblock.c @@ -8,11 +8,6 @@ void bootblock_soc_init(void) { clock_init(); - /* - * Through experimentation, we have determined - * that a delay of 1/8 cycle is best for herobrine. - * See b/190231148 - */ - quadspi_init(75000 * KHz, 1); + quadspi_init(50000 * KHz); qupv3_fw_init(); } diff --git a/src/soc/qualcomm/sc7280/clock.c b/src/soc/qualcomm/sc7280/clock.c index 7b017c4d80..4441e48083 100644 --- a/src/soc/qualcomm/sc7280/clock.c +++ b/src/soc/qualcomm/sc7280/clock.c @@ -28,16 +28,6 @@ static struct clock_freq_config qspi_core_cfg[] = { .div = QCOM_CLOCK_DIV(3), }, { - .hz = 240 * MHz, - .src = SRC_GPLL0_MAIN_600MHZ, - .div = QCOM_CLOCK_DIV(2.5), - }, - { - .hz = 300 * MHz, - .src = SRC_GPLL0_MAIN_600MHZ, - .div = QCOM_CLOCK_DIV(2), - }, - { .hz = 400 * MHz, .src = SRC_GPLL0_MAIN_600MHZ, .div = QCOM_CLOCK_DIV(1.5), |