diff options
Diffstat (limited to 'src/soc/qualcomm/ipq806x')
| -rw-r--r-- | src/soc/qualcomm/ipq806x/include/soc/iomap.h | 46 | ||||
| -rw-r--r-- | src/soc/qualcomm/ipq806x/usb.c | 4 |
2 files changed, 25 insertions, 25 deletions
diff --git a/src/soc/qualcomm/ipq806x/include/soc/iomap.h b/src/soc/qualcomm/ipq806x/include/soc/iomap.h index 4a3aa49140..18751a8753 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/iomap.h +++ b/src/soc/qualcomm/ipq806x/include/soc/iomap.h @@ -101,12 +101,12 @@ #define USB_HOST1_PHY_BASE 0x110F8800 #define GSBI_4 4 -#define UART1_DM_BASE 0x12450000 -#define UART_GSBI1_BASE 0x12440000 +#define UART1_DM_BASE 0x12450000 +#define UART_GSBI1_BASE 0x12440000 #define UART2_DM_BASE 0x12490000 #define UART_GSBI2_BASE 0x12480000 -#define UART4_DM_BASE 0x16340000 -#define UART_GSBI4_BASE 0x16300000 +#define UART4_DM_BASE 0x16340000 +#define UART_GSBI4_BASE 0x16300000 #define UART2_DM_BASE 0x12490000 #define UART_GSBI2_BASE 0x12480000 @@ -135,25 +135,25 @@ #define GSBI_QUP6_BASE (GSBI6_BASE + 0x80000) #define GSBI_QUP7_BASE (GSBI7_BASE + 0x80000) -#define GSBI_CTL_PROTO_I2C 2 -#define GSBI_CTL_PROTO_CODE_SFT 4 -#define GSBI_CTL_PROTO_CODE_MSK 0x7 -#define GSBI_HCLK_CTL_GATE_ENA 6 -#define GSBI_HCLK_CTL_BRANCH_ENA 4 -#define GSBI_QUP_APPS_M_SHFT 16 -#define GSBI_QUP_APPS_M_MASK 0xFF -#define GSBI_QUP_APPS_D_SHFT 0 -#define GSBI_QUP_APPS_D_MASK 0xFF -#define GSBI_QUP_APPS_N_SHFT 16 -#define GSBI_QUP_APPS_N_MASK 0xFF -#define GSBI_QUP_APPS_ROOT_ENA_SFT 11 -#define GSBI_QUP_APPS_BRANCH_ENA_SFT 9 -#define GSBI_QUP_APPS_MNCTR_EN_SFT 8 -#define GSBI_QUP_APPS_MNCTR_MODE_MSK 0x3 -#define GSBI_QUP_APPS_MNCTR_MODE_SFT 5 -#define GSBI_QUP_APPS_PRE_DIV_MSK 0x3 -#define GSBI_QUP_APPS_PRE_DIV_SFT 3 -#define GSBI_QUP_APPS_SRC_SEL_MSK 0x7 +#define GSBI_CTL_PROTO_I2C 2 +#define GSBI_CTL_PROTO_CODE_SFT 4 +#define GSBI_CTL_PROTO_CODE_MSK 0x7 +#define GSBI_HCLK_CTL_GATE_ENA 6 +#define GSBI_HCLK_CTL_BRANCH_ENA 4 +#define GSBI_QUP_APPS_M_SHFT 16 +#define GSBI_QUP_APPS_M_MASK 0xFF +#define GSBI_QUP_APPS_D_SHFT 0 +#define GSBI_QUP_APPS_D_MASK 0xFF +#define GSBI_QUP_APPS_N_SHFT 16 +#define GSBI_QUP_APPS_N_MASK 0xFF +#define GSBI_QUP_APPS_ROOT_ENA_SFT 11 +#define GSBI_QUP_APPS_BRANCH_ENA_SFT 9 +#define GSBI_QUP_APPS_MNCTR_EN_SFT 8 +#define GSBI_QUP_APPS_MNCTR_MODE_MSK 0x3 +#define GSBI_QUP_APPS_MNCTR_MODE_SFT 5 +#define GSBI_QUP_APPS_PRE_DIV_MSK 0x3 +#define GSBI_QUP_APPS_PRE_DIV_SFT 3 +#define GSBI_QUP_APPS_SRC_SEL_MSK 0x7 #define GSBI_QUP_APSS_MD_REG(gsbi_n) ((MSM_CLK_CTL_BASE + 0x29c8) + \ diff --git a/src/soc/qualcomm/ipq806x/usb.c b/src/soc/qualcomm/ipq806x/usb.c index a8d991059f..f8f4e4da93 100644 --- a/src/soc/qualcomm/ipq806x/usb.c +++ b/src/soc/qualcomm/ipq806x/usb.c @@ -123,7 +123,7 @@ static void setup_dwc3(struct usb_dwc3 *dwc3) write32(&dwc3->uctl, 0x32 << 22 | /* (default) reference clock period in ns */ 0x1 << 15 | /* (default) XHCI compliant device addressing */ - 0x10 << 0); /* (default) devices time out after 32us */ + 0x10 << 0); /* (default) devices time out after 32us */ udelay(5); @@ -149,7 +149,7 @@ static void setup_phy(struct usb_qc_phy *phy) 0x1 << 18 | /* use ref clock from core */ 0x1 << 17 | /* (default) unclamp DPSE VLS */ 0x1 << 11 | /* force xo/bias/pll to stay on in suspend */ - 0x1 << 9 | /* (default) unclamp IDHV */ + 0x1 << 9 | /* (default) unclamp IDHV */ 0x1 << 8 | /* (default) unclamp VLS (again???) */ 0x1 << 7 | /* (default) unclamp HV VLS */ 0x7 << 4 | /* select frequency (no idea which one) */ |