diff options
Diffstat (limited to 'src/soc/qualcomm/ipq806x/include')
| -rw-r--r-- | src/soc/qualcomm/ipq806x/include/clock.h | 11 | ||||
| -rw-r--r-- | src/soc/qualcomm/ipq806x/include/iomap.h | 8 | ||||
| -rw-r--r-- | src/soc/qualcomm/ipq806x/include/usb.h | 26 |
3 files changed, 45 insertions, 0 deletions
diff --git a/src/soc/qualcomm/ipq806x/include/clock.h b/src/soc/qualcomm/ipq806x/include/clock.h index c5d4121169..98f6661e02 100644 --- a/src/soc/qualcomm/ipq806x/include/clock.h +++ b/src/soc/qualcomm/ipq806x/include/clock.h @@ -63,6 +63,16 @@ #define CFPB_SPLITTER_HCLK_CTL_REG REG(0x026E0) #define EBI2_CLK_CTL_REG REG(0x03B00) +#define USB30_MASTER_CLK_CTL_REG REG(0x3b24) +#define USB30_MASTER_CLK_MD REG(0x3b28) +#define USB30_MASTER_CLK_NS REG(0x3b2c) +#define USB30_1_MASTER_CLK_CTL_REG REG(0x3b34) +#define USB30_MOC_UTMI_CLK_MD REG(0x3b40) +#define USB30_MOC_UTMI_CLK_NS REG(0x3b44) +#define USB30_MOC_UTMI_CLK_CTL REG(0x3b48) +#define USB30_1_MOC_UTMI_CLK_CTL REG(0x3b4c) +#define USB30_RESET REG(0x3b50) + #define ALWAYS_ON_CLK_BRANCH_ENA(i) ((i) << 8) #define CLK_BRANCH_ENA_MASK 0x00000010 @@ -182,5 +192,6 @@ void uart_pll_vote_clk_enable(unsigned int); void uart_clock_config(unsigned int gsbi_port, unsigned int m, unsigned int n, unsigned int d, unsigned int clk_dummy); void nand_clock_config(void); +void usb_clock_config(void); #endif /* __PLATFORM_IPQ860X_CLOCK_H_ */ diff --git a/src/soc/qualcomm/ipq806x/include/iomap.h b/src/soc/qualcomm/ipq806x/include/iomap.h index be523a65cd..69744bcd51 100644 --- a/src/soc/qualcomm/ipq806x/include/iomap.h +++ b/src/soc/qualcomm/ipq806x/include/iomap.h @@ -85,6 +85,14 @@ #define GPIO_CONFIG_ADDR(x) (TLMM_BASE_ADDR + 0x1000 + (x)*0x10) #define GPIO_IN_OUT_ADDR(x) (TLMM_BASE_ADDR + 0x1004 + (x)*0x10) +/* Yes, this is not a typo... host2 is actually mapped before host1. */ +#define USB_HOST2_XHCI_BASE 0x10000000 +#define USB_HOST2_DWC3_BASE 0x1000C100 +#define USB_HOST2_PHY_BASE 0x100F8800 +#define USB_HOST1_XHCI_BASE 0x11000000 +#define USB_HOST1_DWC3_BASE 0x1100C100 +#define USB_HOST1_PHY_BASE 0x110F8800 + #define GSBI_1 1 #define GSBI_2 2 #define GSBI_4 4 diff --git a/src/soc/qualcomm/ipq806x/include/usb.h b/src/soc/qualcomm/ipq806x/include/usb.h new file mode 100644 index 0000000000..c3c4c48ce9 --- /dev/null +++ b/src/soc/qualcomm/ipq806x/include/usb.h @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _IPQ806X_USB_H_ +#define _IPQ806X_USB_H_ + +void setup_usb_host1(void); +void setup_usb_host2(void); + +#endif /* _IPQ806X_USB_H_ */ |