diff options
Diffstat (limited to 'src/soc/qualcomm/ipq40xx/spi.c')
| -rw-r--r-- | src/soc/qualcomm/ipq40xx/spi.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/qualcomm/ipq40xx/spi.c b/src/soc/qualcomm/ipq40xx/spi.c index b68e1cb864..3b0d63603d 100644 --- a/src/soc/qualcomm/ipq40xx/spi.c +++ b/src/soc/qualcomm/ipq40xx/spi.c @@ -240,7 +240,7 @@ static int spi_hw_init(struct ipq_spi_slave *ds) * Configure Mini core to SPI core with Input Output enabled, * SPI master, N = 8 bits */ - clrsetbits_le32(ds->regs->qup_config, QUP_CONFIG_MINI_CORE_MSK | + clrsetbits32(ds->regs->qup_config, QUP_CONFIG_MINI_CORE_MSK | QUP_CONF_INPUT_MSK | QUP_CONF_OUTPUT_MSK | QUP_CONF_N_MASK, @@ -253,7 +253,7 @@ static int spi_hw_init(struct ipq_spi_slave *ds) * Configure Input first SPI protocol, * SPI master mode and no loopback */ - clrsetbits_le32(ds->regs->spi_config, SPI_CONFIG_LOOP_BACK_MSK | + clrsetbits32(ds->regs->spi_config, SPI_CONFIG_LOOP_BACK_MSK | SPI_CONFIG_NO_SLAVE_OPER_MSK, SPI_CONFIG_NO_LOOP_BACK | SPI_CONFIG_NO_SLAVE_OPER); @@ -273,7 +273,7 @@ static int spi_hw_init(struct ipq_spi_slave *ds) * INPUT_MODE = Block Mode * OUTPUT MODE = Block Mode */ - clrsetbits_le32(ds->regs->qup_io_modes, + clrsetbits32(ds->regs->qup_io_modes, QUP_IO_MODES_OUTPUT_BIT_SHIFT_MSK | QUP_IO_MODES_INPUT_MODE_MSK | QUP_IO_MODES_OUTPUT_MODE_MSK, @@ -320,10 +320,10 @@ static void write_force_cs(const struct spi_slave *slave, int assert) struct ipq_spi_slave *ds = to_ipq_spi(slave); if (assert) - clrsetbits_le32(ds->regs->io_control, + clrsetbits32(ds->regs->io_control, SPI_IO_CTRL_FORCE_CS_MSK, SPI_IO_CTRL_FORCE_CS_EN); else - clrsetbits_le32(ds->regs->io_control, + clrsetbits32(ds->regs->io_control, SPI_IO_CTRL_FORCE_CS_MSK, SPI_IO_CTRL_FORCE_CS_DIS); return; @@ -385,18 +385,18 @@ static void enable_io_config(struct ipq_spi_slave *ds, { if (write_cnt) { - clrsetbits_le32(ds->regs->qup_config, + clrsetbits32(ds->regs->qup_config, QUP_CONF_OUTPUT_MSK, QUP_CONF_OUTPUT_ENA); } else { - clrsetbits_le32(ds->regs->qup_config, + clrsetbits32(ds->regs->qup_config, QUP_CONF_OUTPUT_MSK, QUP_CONF_NO_OUTPUT); } if (read_cnt) { - clrsetbits_le32(ds->regs->qup_config, + clrsetbits32(ds->regs->qup_config, QUP_CONF_INPUT_MSK, QUP_CONF_INPUT_ENA); } else { - clrsetbits_le32(ds->regs->qup_config, + clrsetbits32(ds->regs->qup_config, QUP_CONF_INPUT_MSK, QUP_CONF_NO_INPUT); } |