diff options
Diffstat (limited to 'src/soc/nvidia')
| -rw-r--r-- | src/soc/nvidia/tegra124/verstage.c | 3 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra210/mmu_operations.c | 6 |
2 files changed, 5 insertions, 4 deletions
diff --git a/src/soc/nvidia/tegra124/verstage.c b/src/soc/nvidia/tegra124/verstage.c index d99f1a719e..2495351f6c 100644 --- a/src/soc/nvidia/tegra124/verstage.c +++ b/src/soc/nvidia/tegra124/verstage.c @@ -30,7 +30,8 @@ static void enable_cache(void) /* Whole space is uncached. */ mmu_config_range(0, 4096, DCACHE_OFF); /* SRAM is cached. MMU code will round size up to page size. */ - mmu_config_range((uintptr_t)_sram/MiB, DIV_ROUND_UP(_sram_size, MiB), + mmu_config_range((uintptr_t)_sram/MiB, + DIV_ROUND_UP(REGION_SIZE(sram), MiB), DCACHE_WRITEBACK); mmu_disable_range(0, 1); dcache_mmu_enable(); diff --git a/src/soc/nvidia/tegra210/mmu_operations.c b/src/soc/nvidia/tegra210/mmu_operations.c index de7ae2f487..9cee6b2f29 100644 --- a/src/soc/nvidia/tegra210/mmu_operations.c +++ b/src/soc/nvidia/tegra210/mmu_operations.c @@ -45,7 +45,7 @@ static void tegra210_mmu_config(void) mmu_config_range((void *)(start * MiB), (end-start) * MiB, cachedmem); /* SRAM */ - mmu_config_range(_sram, _sram_size, cachedmem); + mmu_config_range(_sram, REGION_SIZE(sram), cachedmem); /* Add TZ carveout. */ carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib); @@ -89,8 +89,8 @@ void tegra210_mmu_init(void) * */ carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib); - assert((uintptr_t)_ttb + _ttb_size == (tz_base_mib + tz_size_mib) * MiB - && _ttb_size <= tz_size_mib * MiB); + assert((uintptr_t)_ttb + REGION_SIZE(ttb) == (tz_base_mib + tz_size_mib) + * MiB && REGION_SIZE(ttb) <= tz_size_mib * MiB); mmu_enable(); } |