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Diffstat (limited to 'src/soc/nvidia/tegra210')
-rw-r--r--src/soc/nvidia/tegra210/dp.c4
-rw-r--r--src/soc/nvidia/tegra210/sor.c4
-rw-r--r--src/soc/nvidia/tegra210/spi.c2
3 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/nvidia/tegra210/dp.c b/src/soc/nvidia/tegra210/dp.c
index f3bc208128..f6f955c51e 100644
--- a/src/soc/nvidia/tegra210/dp.c
+++ b/src/soc/nvidia/tegra210/dp.c
@@ -36,7 +36,7 @@ struct tegra_dc_dp_data dp_data;
static inline u32 tegra_dpaux_readl(struct tegra_dc_dp_data *dp, u32 reg)
{
- void *addr = dp->aux_base + (u32) (reg << 2);
+ void *addr = dp->aux_base + (u32)(reg << 2);
u32 reg_val = READL(addr);
return reg_val;
}
@@ -44,7 +44,7 @@ static inline u32 tegra_dpaux_readl(struct tegra_dc_dp_data *dp, u32 reg)
static inline void tegra_dpaux_writel(struct tegra_dc_dp_data *dp,
u32 reg, u32 val)
{
- void *addr = dp->aux_base + (u32) (reg << 2);
+ void *addr = dp->aux_base + (u32)(reg << 2);
WRITEL(val, addr);
}
diff --git a/src/soc/nvidia/tegra210/sor.c b/src/soc/nvidia/tegra210/sor.c
index 91ea5f4eeb..c24e0d6345 100644
--- a/src/soc/nvidia/tegra210/sor.c
+++ b/src/soc/nvidia/tegra210/sor.c
@@ -44,7 +44,7 @@
static inline u32 tegra_sor_readl(struct tegra_dc_sor_data *sor, u32 reg)
{
- void *addr = sor->base + (u32) (reg << 2);
+ void *addr = sor->base + (u32)(reg << 2);
u32 reg_val = READL(addr);
return reg_val;
}
@@ -52,7 +52,7 @@ static inline u32 tegra_sor_readl(struct tegra_dc_sor_data *sor, u32 reg)
static inline void tegra_sor_writel(struct tegra_dc_sor_data *sor,
u32 reg, u32 val)
{
- void *addr = sor->base + (u32) (reg << 2);
+ void *addr = sor->base + (u32)(reg << 2);
WRITEL(val, addr);
}
diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c
index f8db110f7a..0f38df2e6a 100644
--- a/src/soc/nvidia/tegra210/spi.c
+++ b/src/soc/nvidia/tegra210/spi.c
@@ -478,7 +478,7 @@ static int tegra_spi_dma_prepare(struct tegra_spi_channel *spi,
dcache_clean_by_mva(spi->out_buf, bytes);
write32(&spi->dma_out->regs->apb_ptr,
- (uintptr_t) & spi->regs->tx_fifo);
+ (uintptr_t)&spi->regs->tx_fifo);
write32(&spi->dma_out->regs->ahb_ptr, (uintptr_t)spi->out_buf);
setbits32(&spi->dma_out->regs->csr, APB_CSR_DIR);
setup_dma_params(spi, spi->dma_out);