diff options
Diffstat (limited to 'src/soc/nvidia/tegra210/include')
| -rw-r--r-- | src/soc/nvidia/tegra210/include/soc/addressmap.h | 7 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra210/include/soc/memlayout.ld | 1 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld | 1 |
3 files changed, 2 insertions, 7 deletions
diff --git a/src/soc/nvidia/tegra210/include/soc/addressmap.h b/src/soc/nvidia/tegra210/include/soc/addressmap.h index 2151be5f0b..2f6bd8a5f9 100644 --- a/src/soc/nvidia/tegra210/include/soc/addressmap.h +++ b/src/soc/nvidia/tegra210/include/soc/addressmap.h @@ -129,13 +129,6 @@ void carveout_range(int id, uintptr_t *base_mib, size_t *size_mib); void print_carveouts(void); /* - * Add any board-specific memory ranges to the address map when executing - * on aarchv8 core. - */ -struct memranges; -void mainboard_add_memory_ranges(struct memranges *map); - -/* * There are complications accessing the Trust Zone carveout region. The * AVP cannot access these registers and the CPU can't access this register * as a non-secure access. When the page tables live in non-secure memory diff --git a/src/soc/nvidia/tegra210/include/soc/memlayout.ld b/src/soc/nvidia/tegra210/include/soc/memlayout.ld index d24f980207..0338cd9604 100644 --- a/src/soc/nvidia/tegra210/include/soc/memlayout.ld +++ b/src/soc/nvidia/tegra210/include/soc/memlayout.ld @@ -38,4 +38,5 @@ SECTIONS DRAM_START(0x80000000) POSTRAM_CBFS_CACHE(0x80100000, 1M) RAMSTAGE(0x80200000, 256K) + TTB(0x100000000 - CONFIG_TTB_SIZE_MB * 1M, CONFIG_TTB_SIZE_MB * 1M) } diff --git a/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld b/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld index e2e4dd8d24..b4b3dc2822 100644 --- a/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld +++ b/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld @@ -40,4 +40,5 @@ SECTIONS DRAM_START(0x80000000) POSTRAM_CBFS_CACHE(0x80100000, 1M) RAMSTAGE(0x80200000, 256K) + TTB(0x100000000 - CONFIG_TTB_SIZE_MB * 1M, CONFIG_TTB_SIZE_MB * 1M) } |