diff options
Diffstat (limited to 'src/soc/nvidia/tegra132/include')
4 files changed, 2 insertions, 11 deletions
diff --git a/src/soc/nvidia/tegra132/include/soc/addressmap.h b/src/soc/nvidia/tegra132/include/soc/addressmap.h index f51920f24d..fee67fe692 100644 --- a/src/soc/nvidia/tegra132/include/soc/addressmap.h +++ b/src/soc/nvidia/tegra132/include/soc/addressmap.h @@ -114,14 +114,6 @@ enum { /* Provided the careout id, obtain the base and size in 1MiB units. */ void carveout_range(int id, uintptr_t *base_mib, size_t *size_mib); - -/* - * Add any board-specific memory ranges to the address map when executing - * on aarchv8 core. - */ -struct memranges; -void mainboard_add_memory_ranges(struct memranges *map); - /* * There are complications accessing the Trust Zone carveout region. The * AVP cannot access these registers and the CPU can't access this register diff --git a/src/soc/nvidia/tegra132/include/soc/memlayout.ld b/src/soc/nvidia/tegra132/include/soc/memlayout.ld index 0c610422ef..d403c17127 100644 --- a/src/soc/nvidia/tegra132/include/soc/memlayout.ld +++ b/src/soc/nvidia/tegra132/include/soc/memlayout.ld @@ -38,4 +38,5 @@ SECTIONS DRAM_START(0x80000000) POSTRAM_CBFS_CACHE(0x80100000, 1M) RAMSTAGE(0x80200000, 256K) + TTB(0x100000000 - CONFIG_TRUSTZONE_CARVEOUT_SIZE_MB * 1M, 1M) } diff --git a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld index a024435a6f..7a6a1688fb 100644 --- a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld +++ b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld @@ -40,4 +40,5 @@ SECTIONS DRAM_START(0x80000000) POSTRAM_CBFS_CACHE(0x80100000, 1M) RAMSTAGE(0x80200000, 256K) + TTB(0x100000000 - CONFIG_TRUSTZONE_CARVEOUT_SIZE_MB * 1M, 1M) } diff --git a/src/soc/nvidia/tegra132/include/soc/mmu_operations.h b/src/soc/nvidia/tegra132/include/soc/mmu_operations.h index df5472e86c..f604c40e25 100644 --- a/src/soc/nvidia/tegra132/include/soc/mmu_operations.h +++ b/src/soc/nvidia/tegra132/include/soc/mmu_operations.h @@ -18,7 +18,4 @@ void tegra132_mmu_init(void); -/* Default ttb size of 1MiB */ -#define TTB_SIZE 0x1 - #endif //__SOC_NVIDIA_TEGRA132_MMU_OPERATIONS_H__ |