diff options
Diffstat (limited to 'src/soc/nvidia/tegra132/clock.c')
| -rw-r--r-- | src/soc/nvidia/tegra132/clock.c | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/src/soc/nvidia/tegra132/clock.c b/src/soc/nvidia/tegra132/clock.c index ed5afbaa45..caeb24a9a1 100644 --- a/src/soc/nvidia/tegra132/clock.c +++ b/src/soc/nvidia/tegra132/clock.c @@ -584,7 +584,7 @@ void clock_grp_enable_clear_reset(u32 val, u32* clk_enb_set_reg, writel(val, rst_dev_clr_reg); } -void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x) +void clock_enable(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x) { if (l) writel(l, &clk_rst->clk_enb_l_set); @@ -598,10 +598,10 @@ void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x) writel(w, &clk_rst->clk_enb_w_set); if (x) writel(x, &clk_rst->clk_enb_x_set); +} - /* Give clocks time to stabilize. */ - udelay(IO_STABILIZATION_DELAY); - +void clock_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x) +{ if (l) writel(l, &clk_rst->rst_dev_l_clr); if (h) @@ -616,6 +616,16 @@ void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x) writel(x, &clk_rst->rst_dev_x_clr); } +void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x) +{ + clock_enable(l, h, u, v, w, x); + + /* Give clocks time to stabilize. */ + udelay(IO_STABILIZATION_DELAY); + + clock_clear_reset(l, h, u, v, w, x); +} + void clock_reset_l(u32 bit) { writel(bit, &clk_rst->rst_dev_l_set); |