4 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/nvidia/tegra124/clock.c b/src/soc/nvidia/tegra124/clock.c
index e96a80c384..9173e62000 100644
--- a/src/soc/nvidia/tegra124/clock.c
+++ b/src/soc/nvidia/tegra124/clock.c
@@ -483,7 +483,7 @@ void clock_sdram(u32 m, u32 n, u32 p, u32 setup, u32 ph45, u32 ph90,
 
 void clock_cpu0_config(void *entry)
 {
-	void * const evp_cpu_reset = (uint8_t *)TEGRA_EVP_BASE + 0x100;
+	void *const evp_cpu_reset = (uint8_t *)TEGRA_EVP_BASE + 0x100;
 
 	write32(&maincpu_stack_pointer, (uintptr_t)_estack);
 	write32(&maincpu_entry_point, (uintptr_t)entry);
diff --git a/src/soc/nvidia/tegra124/display.c b/src/soc/nvidia/tegra124/display.c
index e66cbbd9dc..febb420497 100644
--- a/src/soc/nvidia/tegra124/display.c
+++ b/src/soc/nvidia/tegra124/display.c
@@ -38,7 +38,7 @@
 struct tegra_dc dc_data;
 
 int dump = 0;
-unsigned long READL(void * p)
+unsigned long READL(void *p)
 {
         unsigned long value;
 
@@ -55,7 +55,7 @@ unsigned long READL(void * p)
         return value;
 }
 
-void WRITEL(unsigned long value, void * p)
+void WRITEL(unsigned long value, void *p)
 {
         if (dump)
 		printk(BIOS_SPEW, "writel %p %08lx\n", p, value);
diff --git a/src/soc/nvidia/tegra124/dp.c b/src/soc/nvidia/tegra124/dp.c
index 8a316f2a5c..a9b8d7da97 100644
--- a/src/soc/nvidia/tegra124/dp.c
+++ b/src/soc/nvidia/tegra124/dp.c
@@ -328,7 +328,7 @@ static int tegra_dc_dpaux_read(struct tegra_dc_dp_data *dp, u32 cmd, u32 addr,
 }
 
 static int tegra_dc_dp_dpcd_read(struct tegra_dc_dp_data *dp, u32 cmd,
-				 u8 * data_ptr)
+				 u8 *data_ptr)
 {
 	u32 size = 1;
 	u32 status = 0;
@@ -1356,7 +1356,7 @@ static void tegra_dp_update_config(struct tegra_dc_dp_data *dp,
 	printk(BIOS_SPEW, "%s: configuration updated by EDID.\n", __func__);
 }
 
-void dp_init(void * _config)
+void dp_init(void *_config)
 {
 	struct soc_nvidia_tegra124_config *config = (void *)_config;
 	struct tegra_dc *dc = config->dc_data;
@@ -1406,7 +1406,7 @@ static int tegra_dp_hpd_plug(struct tegra_dc_dp_data *dp, int timeout_ms)
 	return -1;
 }
 
-void dp_enable(void * _dp)
+void dp_enable(void *_dp)
 {
 	struct tegra_dc_dp_data *dp = _dp;
 	struct tegra_dc *dc = dp->dc;
diff --git a/src/soc/nvidia/tegra124/include/soc/clock.h b/src/soc/nvidia/tegra124/include/soc/clock.h
index 28d1603fba..d08e26fb80 100644
--- a/src/soc/nvidia/tegra124/include/soc/clock.h
+++ b/src/soc/nvidia/tegra124/include/soc/clock.h
@@ -290,7 +290,7 @@ void clock_external_output(int clk_id);
 void clock_sdram(u32 m, u32 n, u32 p, u32 setup, u32 ph45, u32 ph90,
 		 u32 ph135, u32 kvco, u32 kcp, u32 stable_time, u32 emc_source,
 		 u32 same_freq);
-void clock_cpu0_config(void * entry);
+void clock_cpu0_config(void *entry);
 void clock_cpu0_remove_reset(void);
 void clock_halt_avp(void);
 void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x);