diff options
Diffstat (limited to 'src/soc/nvidia/tegra124/power.c')
| -rw-r--r-- | src/soc/nvidia/tegra124/power.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/nvidia/tegra124/power.c b/src/soc/nvidia/tegra124/power.c index b31d3a7781..962a8e12e3 100644 --- a/src/soc/nvidia/tegra124/power.c +++ b/src/soc/nvidia/tegra124/power.c @@ -48,7 +48,7 @@ static void power_ungate_partition(uint32_t id) pwrgate_toggle &= ~(PMC_PWRGATE_TOGGLE_PARTID_MASK); pwrgate_toggle |= (id << PMC_PWRGATE_TOGGLE_PARTID_SHIFT); pwrgate_toggle |= PMC_PWRGATE_TOGGLE_START; - writel(pwrgate_toggle, &pmc->pwrgate_toggle); + write32(&pmc->pwrgate_toggle, pwrgate_toggle); // Wait for the request to be accepted. while (read32(&pmc->pwrgate_toggle) & PMC_PWRGATE_TOGGLE_START) @@ -73,12 +73,12 @@ void power_enable_and_ungate_cpu(void) * Set CPUPWRGOOD_TIMER - APB clock is 1/2 of SCLK (150MHz), * set it for 5ms as per SysEng (5ms * PCLK_KHZ * 1000 / 1s). */ - writel((TEGRA_PCLK_KHZ * 5), &pmc->cpupwrgood_timer); + write32(&pmc->cpupwrgood_timer, (TEGRA_PCLK_KHZ * 5)); uint32_t cntrl = read32(&pmc->cntrl); cntrl &= ~PMC_CNTRL_CPUPWRREQ_POLARITY; cntrl |= PMC_CNTRL_CPUPWRREQ_OE; - writel(cntrl, &pmc->cntrl); + write32(&pmc->cntrl, cntrl); power_ungate_partition(POWER_PARTID_CRAIL); |