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-rw-r--r--src/soc/nvidia/tegra124/include/soc/clk_rst.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/nvidia/tegra124/include/soc/clk_rst.h b/src/soc/nvidia/tegra124/include/soc/clk_rst.h
index 36888b132c..7cac4ba319 100644
--- a/src/soc/nvidia/tegra124/include/soc/clk_rst.h
+++ b/src/soc/nvidia/tegra124/include/soc/clk_rst.h
@@ -471,12 +471,12 @@ enum {
#define SCLK_DIVISOR_MASK (0xff << SCLK_DIVISOR_SHIFT)
/* CLK_RST_CONTROLLER_CLK_SYSTEM_RATE 0x30 */
-#define HCLK_DISABLE (1 << 7)
-#define HCLK_DIVISOR_SHIFT 4
-#define HCLK_DIVISOR_MASK (3 << AHB_RATE_SHIFT)
-#define PCLK_DISABLE (1 << 3)
-#define PCLK_DIVISOR_SHIFT 0
-#define PCLK_DIVISOR_MASK (3 << AHB_RATE_SHIFT)
+#define HCLK_DISABLE (1 << 7)
+#define HCLK_DIVISOR_SHIFT 4
+#define HCLK_DIVISOR_MASK (3 << AHB_RATE_SHIFT)
+#define PCLK_DISABLE (1 << 3)
+#define PCLK_DIVISOR_SHIFT 0
+#define PCLK_DIVISOR_MASK (3 << AHB_RATE_SHIFT)
/* CRC_CLK_SOURCE_MSELECT_0 0x3b4 */
#define MSELECT_CLK_SRC_PLLP_OUT0 (0 << 29)