2 files changed, 4 insertions, 5 deletions
diff --git a/src/soc/nvidia/tegra124/include/soc/addressmap.h b/src/soc/nvidia/tegra124/include/soc/addressmap.h
index 5e55ee57e0..063e369d50 100644
--- a/src/soc/nvidia/tegra124/include/soc/addressmap.h
+++ b/src/soc/nvidia/tegra124/include/soc/addressmap.h
@@ -80,9 +80,4 @@ enum {
 	TEGRA_I2C_BASE_COUNT = 6,
 };
 
-enum {
-	FB_SIZE_MB = (32),
-	FB_BASE_MB = (CONFIG_SYS_SDRAM_BASE/MiB + (CONFIG_DRAM_SIZE_MB - FB_SIZE_MB)),
-};
-
 #endif /* __SOC_NVIDIA_TEGRA124_INCLUDE_SOC_ADDRESS_MAP_H__ */
diff --git a/src/soc/nvidia/tegra124/include/soc/display.h b/src/soc/nvidia/tegra124/include/soc/display.h
index b764671134..36348ff0c3 100644
--- a/src/soc/nvidia/tegra124/include/soc/display.h
+++ b/src/soc/nvidia/tegra124/include/soc/display.h
@@ -188,6 +188,7 @@
 #define COLORDEPTH	0x6
 #define COLOR_WHITE	0xFFFFFF
 
+struct soc_nvidia_tegra124_config;	/* forward declaration */
 void setup_display(struct soc_nvidia_tegra124_config *config);
 void init_dca_regs(void);
 void dp_io_powerup(void);
@@ -195,4 +196,7 @@ u32 dp_setup_timing(u32 width, u32 height);
 void dp_misc_setting(u32 panel_bpp, u32 width, u32 height, u32 winb_addr,
 		     u32 lane_count, u32 enhanced_framing, u32 panel_edp,
 		     u32 pclkfreq, u32 linkfreq);
+
+#define FB_SIZE_MB (32)
+
 #endif /* __SOC_NVIDIA_TEGRA124_INCLUDE_SOC_DISPLAY_H__ */