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-rw-r--r--src/soc/mediatek/mt8183/pll.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/pll.c b/src/soc/mediatek/mt8183/pll.c
index 799b6ca315..19670256a1 100644
--- a/src/soc/mediatek/mt8183/pll.c
+++ b/src/soc/mediatek/mt8183/pll.c
@@ -345,6 +345,9 @@ void mt_pll_init(void)
/* enable infrasys DCM */
setbits_le32(&mt8183_infracfg->infra_bus_dcm_ctrl, 0x3 << 21);
+ /* enable [11] for change i2c module source clock to TOPCKGEN */
+ setbits_le32(&mt8183_infracfg->module_clk_sel, 0x1 << 11);
+
/*
* TOP CLKMUX -- DO NOT CHANGE WITHOUT ADJUSTING <soc/pll.h> CONSTANTS!
*/