4 files changed, 12 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8186/Makefile.inc b/src/soc/mediatek/mt8186/Makefile.inc
index 8b0e52a8e9..f214bbdaef 100644
--- a/src/soc/mediatek/mt8186/Makefile.inc
+++ b/src/soc/mediatek/mt8186/Makefile.inc
@@ -4,6 +4,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8186),y)
 all-y += ../common/flash_controller.c
 all-y += ../common/gpio.c ../common/gpio_op.c  gpio.c
 all-y += ../common/i2c.c i2c.c
+all-y += ../common/pll.c pll.c
 all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
 all-y += ../common/timer.c ../common/timer_prepare.c
 all-y += ../common/uart.c
@@ -12,7 +13,6 @@ bootblock-y += bootblock.c
 bootblock-y += ../common/eint_event.c
 bootblock-y += gic.c
 bootblock-y += ../common/mmu_operations.c
-bootblock-y += ../common/pll.c pll.c
 bootblock-y += ../common/tracker.c ../common/tracker_v1.c
 bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c
 
@@ -23,7 +23,6 @@ romstage-y += emi.c
 romstage-y += ../common/memory.c
 romstage-y += ../common/memory_test.c
 romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
-romstage-y += ../common/pll.c pll.c
 romstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c
 romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c
 
diff --git a/src/soc/mediatek/mt8186/include/soc/pll.h b/src/soc/mediatek/mt8186/include/soc/pll.h
index c2dace3220..bcd00da23c 100644
--- a/src/soc/mediatek/mt8186/include/soc/pll.h
+++ b/src/soc/mediatek/mt8186/include/soc/pll.h
@@ -522,4 +522,6 @@ DEFINE_BITFIELD(INFRACFG_AO_PERI_BUS_REG0_0, 1, 0)
 DEFINE_BITFIELD(INFRACFG_AO_PERI_BUS_REG0_1, 27, 3)
 DEFINE_BIT(INFRACFG_AO_PERI_BUS_REG0_2, 31)
 
+DEFINE_BITFIELD(USB_TOP_CFG_MACRO_CTRL, 1, 0)
+
 #endif /* SOC_MEDIATEK_MT8186_PLL_H */
diff --git a/src/soc/mediatek/mt8186/pll.c b/src/soc/mediatek/mt8186/pll.c
index cd41d5e5f9..7179c2eac6 100644
--- a/src/soc/mediatek/mt8186/pll.c
+++ b/src/soc/mediatek/mt8186/pll.c
@@ -516,6 +516,12 @@ void mt_pll_raise_cci_freq(u32 freq)
 	clrsetbits32(&mtk_mcucfg->bus_plldiv_cfg, MCU_MUX_MASK, MCU_MUX_SRC_PLL);
 }
 
+void mt_pll_set_usb_clock(void)
+{
+	/* enable usb macro control */
+	SET32_BITFIELDS(&mtk_topckgen->usb_top_cfg, USB_TOP_CFG_MACRO_CTRL, 3);
+}
+
 u32 mt_fmeter_get_freq_khz(enum fmeter_type type, u32 id)
 {
 	u32 output, count, clk_dbg_cfg, clk_misc_cfg_0, clk26cali_0, clk26cali_1;
diff --git a/src/soc/mediatek/mt8186/usb.c b/src/soc/mediatek/mt8186/usb.c
index d13355527d..98d9c7c00e 100644
--- a/src/soc/mediatek/mt8186/usb.c
+++ b/src/soc/mediatek/mt8186/usb.c
@@ -8,6 +8,7 @@
 #include <device/mmio.h>
 #include <gpio.h>
 #include <soc/gpio.h>
+#include <soc/pll_common.h>
 #include <soc/usb.h>
 
 #define PERI_USB_WAKEUP_DEC_CON1	0x404
@@ -15,6 +16,8 @@
 
 void mtk_usb_prepare(void)
 {
+	mt_pll_set_usb_clock();
+
 	gpio_output(GPIO(USB_DRVVBUS_P1), 1);
 
 	/* disable IP0 debounce */