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-rw-r--r--src/soc/mediatek/mt8196/Kconfig1
-rw-r--r--src/soc/mediatek/mt8196/Makefile.mk1
-rw-r--r--src/soc/mediatek/mt8196/include/soc/spi.h3
-rw-r--r--src/soc/mediatek/mt8196/spi.c21
4 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8196/Kconfig b/src/soc/mediatek/mt8196/Kconfig
index 309622776e..57b62dd565 100644
--- a/src/soc/mediatek/mt8196/Kconfig
+++ b/src/soc/mediatek/mt8196/Kconfig
@@ -9,6 +9,7 @@ config SOC_MEDIATEK_MT8196
select ARCH_RAMSTAGE_ARMV8_64
select HAVE_UART_SPECIAL
select SOC_MEDIATEK_COMMON
+ select FLASH_DUAL_IO_READ
select ARM64_USE_ARCH_TIMER
if SOC_MEDIATEK_MT8196
diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk
index 04f1ed1368..96aea39986 100644
--- a/src/soc/mediatek/mt8196/Makefile.mk
+++ b/src/soc/mediatek/mt8196/Makefile.mk
@@ -2,6 +2,7 @@
ifeq ($(CONFIG_SOC_MEDIATEK_MT8196),y)
+all-y += ../common/flash_controller.c
all-y += ../common/gpio.c ../common/gpio_op.c gpio.c
all-$(CONFIG_SPI_FLASH) += spi.c
all-y += timer.c
diff --git a/src/soc/mediatek/mt8196/include/soc/spi.h b/src/soc/mediatek/mt8196/include/soc/spi.h
index 69025d2a3d..43edc89c52 100644
--- a/src/soc/mediatek/mt8196/include/soc/spi.h
+++ b/src/soc/mediatek/mt8196/include/soc/spi.h
@@ -10,4 +10,7 @@
#include <spi-generic.h>
+/* Initialize SPI NOR Flash Controller */
+void mtk_snfc_init(void);
+
#endif
diff --git a/src/soc/mediatek/mt8196/spi.c b/src/soc/mediatek/mt8196/spi.c
index 11bbb5f143..09cd073f8a 100644
--- a/src/soc/mediatek/mt8196/spi.c
+++ b/src/soc/mediatek/mt8196/spi.c
@@ -6,16 +6,37 @@
*/
#include <device/mmio.h>
+#include <gpio.h>
#include <soc/addressmap.h>
+#include <soc/flash_controller_common.h>
#include <soc/spi.h>
+#include <spi_flash.h>
+
+#define PAD_FUNC_SEL(name, func, sel) {GPIO(name), PAD_##name##_FUNC_##func, sel}
+
+static const struct mtk_snfc_pad_func nor_pinmux[4] = {
+ PAD_FUNC_SEL(SDA10, SF_CK, GPIO_PULL_DOWN),
+ PAD_FUNC_SEL(SCL10, SF_CS, GPIO_PULL_UP),
+ PAD_FUNC_SEL(PERIPHERAL_EN5, SF_D0, GPIO_PULL_DOWN),
+ PAD_FUNC_SEL(PERIPHERAL_EN6, SF_D1, GPIO_PULL_DOWN),
+};
+
+void mtk_snfc_init(void)
+{
+ for (size_t i = 0; i < ARRAY_SIZE(nor_pinmux); i++)
+ mtk_snfc_init_pad_func(&nor_pinmux[i], GPIO_DRV_14_MA);
+}
static const struct spi_ctrlr spi_flash_ctrlr = {
.max_xfer_size = 65535,
+ .flash_probe = mtk_spi_flash_probe,
};
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
{
.ctrlr = &spi_flash_ctrlr,
+ .bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
+ .bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
},
};