summaryrefslogtreecommitdiff
path: root/src/soc/mediatek
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/mt8196/Makefile.mk1
-rw-r--r--src/soc/mediatek/mt8196/include/soc/irq2axi.h18
-rw-r--r--src/soc/mediatek/mt8196/irq2axi.c18
3 files changed, 37 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk
index b73f213d6c..6b29e73fe7 100644
--- a/src/soc/mediatek/mt8196/Makefile.mk
+++ b/src/soc/mediatek/mt8196/Makefile.mk
@@ -19,6 +19,7 @@ bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c
romstage-y += ../common/cbmem.c
romstage-$(CONFIG_PCI) += ../common/early_init.c ../common/pcie.c
romstage-y += emi.c
+romstage-y += irq2axi.c
romstage-y += l2c_ops.c
romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
diff --git a/src/soc/mediatek/mt8196/include/soc/irq2axi.h b/src/soc/mediatek/mt8196/include/soc/irq2axi.h
new file mode 100644
index 0000000000..22071e5098
--- /dev/null
+++ b/src/soc/mediatek/mt8196/include/soc/irq2axi.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SOC_MEDIATEK_MT8196_IRQ2AXI_H
+#define SOC_MEDIATEK_MT8196_IRQ2AXI_H
+
+#define IRQ2AXI_BASE 0x14413000
+#define IRQ2AXI_CFG1 (IRQ2AXI_BASE + 0x0004)
+
+#define APIFR_AO_IO_INTX_SEC_REG 0x101C9000
+#define CIRQ_AXI_MODE (APIFR_AO_IO_INTX_SEC_REG + 0x900)
+#define CIRQ_AXI_MODE_LEGACY 0x3
+
+#define MCUSYS_ACK_REG 0x0C00FFEC
+#define MCUSYS_ACK_CLR 0x1
+
+void irq2axi_disable(void);
+
+#endif /* SOC_MEDIATEK_MT8196_IRQ2AXI_H */
diff --git a/src/soc/mediatek/mt8196/irq2axi.c b/src/soc/mediatek/mt8196/irq2axi.c
new file mode 100644
index 0000000000..e0250a97f2
--- /dev/null
+++ b/src/soc/mediatek/mt8196/irq2axi.c
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/console.h>
+#include <device/mmio.h>
+#include <soc/irq2axi.h>
+
+void irq2axi_disable(void)
+{
+ printk(BIOS_DEBUG, "%s\n", __func__);
+ /* disable IRQ2AXI */
+ write32p(IRQ2AXI_CFG1, 0x0);
+
+ /* disable mcusys ack */
+ clrbits32p(MCUSYS_ACK_REG, MCUSYS_ACK_CLR);
+
+ /* switch to legacy channel */
+ clrbits32p(CIRQ_AXI_MODE, CIRQ_AXI_MODE_LEGACY);
+}