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-rw-r--r--src/soc/mediatek/mt8192/pll.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8192/pll.c b/src/soc/mediatek/mt8192/pll.c
index c9e2753174..432b192f45 100644
--- a/src/soc/mediatek/mt8192/pll.c
+++ b/src/soc/mediatek/mt8192/pll.c
@@ -464,7 +464,7 @@ void mt_pll_init(void)
* TOP CLKMUX -- DO NOT CHANGE WITHOUT ADJUSTING <soc/pll.h> CONSTANTS!
*/
for (i = 0; i < ARRAY_SIZE(mux_sels); i++)
- mux_set_sel(&muxes[mux_sels[i].id], mux_sels[i].sel);
+ pll_mux_set_sel(&muxes[mux_sels[i].id], mux_sels[i].sel);
/* enable [14] dramc_pll104m_ck */
setbits32(&mtk_topckgen->clk_misc_cfg_0, 1 << 14);