2 files changed, 52 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/include/soc/addressmap.h b/src/soc/mediatek/mt8192/include/soc/addressmap.h
index c4b30472cd..e0cd5364a3 100644
--- a/src/soc/mediatek/mt8192/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8192/include/soc/addressmap.h
@@ -23,6 +23,14 @@ enum {
 	APMIXED_BASE		= IO_PHYS + 0x0000C000,
 	PWRAP_BASE		= IO_PHYS + 0x0000D000,
 	UART0_BASE		= IO_PHYS + 0x01002000,
+	SPI0_BASE		= IO_PHYS + 0x0100A000,
+	SPI1_BASE		= IO_PHYS + 0x01010000,
+	SPI2_BASE		= IO_PHYS + 0x01012000,
+	SPI3_BASE		= IO_PHYS + 0x01013000,
+	SPI4_BASE		= IO_PHYS + 0x01018000,
+	SPI5_BASE		= IO_PHYS + 0x01019000,
+	SPI6_BASE		= IO_PHYS + 0x0101D000,
+	SPI7_BASE		= IO_PHYS + 0x0101E000,
 	SSUSB_IPPC_BASE		= IO_PHYS + 0x01203e00,
 	SFLASH_REG_BASE		= IO_PHYS + 0x01234000,
 	IOCFG_RM_BASE		= IO_PHYS + 0x01C20000,
diff --git a/src/soc/mediatek/mt8192/include/soc/spi.h b/src/soc/mediatek/mt8192/include/soc/spi.h
new file mode 100644
index 0000000000..034fa3570a
--- /dev/null
+++ b/src/soc/mediatek/mt8192/include/soc/spi.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef MTK_MT8192_SPI_H
+#define MTK_MT8192_SPI_H
+
+#include <soc/spi_common.h>
+
+#define SPI_BUS_NUMBER 8
+
+/* SPI peripheral register map. */
+typedef struct mtk_spi_regs {
+	uint32_t spi_cfg0_reg;
+	uint32_t spi_cfg1_reg;
+	uint32_t spi_tx_src_reg;
+	uint32_t spi_rx_dst_reg;
+	uint32_t spi_tx_data_reg;
+	uint32_t spi_rx_data_reg;
+	uint32_t spi_cmd_reg;
+	uint32_t spi_status0_reg;
+	uint32_t spi_status1_reg;
+	uint32_t spi_pad_macro_sel_reg;
+	uint32_t spi_cfg2_reg;
+	uint32_t spi_tx_src_64_reg;
+	uint32_t spi_rx_dst_64_reg;
+} mtk_spi_regs;
+
+check_member(mtk_spi_regs, spi_pad_macro_sel_reg, 0x24);
+
+enum {
+	SPI_CFG0_CS_HOLD_SHIFT = 0,
+	SPI_CFG0_CS_SETUP_SHIFT = 16,
+};
+
+enum {
+	SPI_CFG2_SCK_LOW_SHIFT = 0,
+	SPI_CFG2_SCK_HIGH_SHIFT = 16,
+};
+
+enum {
+	SPI_CFG1_TICK_DLY_SHIFT = 29,
+	SPI_CFG1_TICK_DLY_MASK = 0x7 << SPI_CFG1_TICK_DLY_SHIFT,
+};
+
+#endif