diff options
Diffstat (limited to 'src/soc/mediatek/mt8188')
| -rw-r--r-- | src/soc/mediatek/mt8188/include/soc/spm.h | 2 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8188/pmif_clk.c | 4 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8188/spm.c | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/mediatek/mt8188/include/soc/spm.h b/src/soc/mediatek/mt8188/include/soc/spm.h index 734a810b1f..9c5a80755a 100644 --- a/src/soc/mediatek/mt8188/include/soc/spm.h +++ b/src/soc/mediatek/mt8188/include/soc/spm.h @@ -437,7 +437,7 @@ enum { }; struct mtk_spm_regs { - u32 poweron_config_en; + u32 poweron_config_set; u32 spm_power_on_val0; u32 spm_power_on_val1; u32 spm_clk_con; diff --git a/src/soc/mediatek/mt8188/pmif_clk.c b/src/soc/mediatek/mt8188/pmif_clk.c index aac9b7b696..0a943254f1 100644 --- a/src/soc/mediatek/mt8188/pmif_clk.c +++ b/src/soc/mediatek/mt8188/pmif_clk.c @@ -106,8 +106,8 @@ static int pmif_init_ulposc(void) pmif_ulposc_config(); /* enable APB clock swinf */ - if (!READ32_BITFIELD(&mtk_spm->poweron_config_en, BCLK_CG_EN)) - SET32_BITFIELDS(&mtk_spm->poweron_config_en, BCLK_CG_EN, 1, + if (!READ32_BITFIELD(&mtk_spm->poweron_config_set, BCLK_CG_EN)) + SET32_BITFIELDS(&mtk_spm->poweron_config_set, BCLK_CG_EN, 1, PROJECT_CODE, 0xb16); /* turn on ulposc */ diff --git a/src/soc/mediatek/mt8188/spm.c b/src/soc/mediatek/mt8188/spm.c index fd4648fbba..c87d1f014b 100644 --- a/src/soc/mediatek/mt8188/spm.c +++ b/src/soc/mediatek/mt8188/spm.c @@ -440,7 +440,7 @@ void spm_register_init(void) /* set clock path for SPM */ setbits32(&mtk_topckgen->clk_scp_cfg_0, 0x7ff); /* enable register control */ - write32(&mtk_spm->poweron_config_en, SPM_REGWR_CFG_KEY | BCLK_CG_EN_LSB); + write32(&mtk_spm->poweron_config_set, SPM_REGWR_CFG_KEY | BCLK_CG_EN_LSB); /* init power control register, dram will set this register */ write32(&mtk_spm->spm_power_on_val1, POWER_ON_VAL1_DEF); write32(&mtk_spm->pcm_pwr_io_en, 0); |