diff options
Diffstat (limited to 'src/soc/mediatek/mt8186')
-rw-r--r-- | src/soc/mediatek/mt8186/include/soc/spm.h | 18 | ||||
-rw-r--r-- | src/soc/mediatek/mt8186/mtcmos.c | 22 |
2 files changed, 40 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8186/include/soc/spm.h b/src/soc/mediatek/mt8186/include/soc/spm.h index 8b8f9b2f23..b402b2cff0 100644 --- a/src/soc/mediatek/mt8186/include/soc/spm.h +++ b/src/soc/mediatek/mt8186/include/soc/spm.h @@ -867,4 +867,22 @@ static const struct power_domain_data disp[] = { static const struct power_domain_data audio[] = { }; +static const struct power_domain_data adsp[] = { + { + .pwr_con = &mtk_spm->adsp_ao_pwr_con, + .pwr_sta_mask = 0x1 << 17, + }, + { + .pwr_con = &mtk_spm->adsp_infra_pwr_con, + .pwr_sta_mask = 0x1 << 10, + }, + { + .pwr_con = &mtk_spm->adsp_pwr_con, + .pwr_sta_mask = 0x1 << 31, + .sram_pdn_mask = 0x1 << 8, + .sram_ack_mask = 0x1 << 12, + .caps = SCPD_SRAM_ISO, + }, +}; + #endif /* SOC_MEDIATEK_MT8186_SPM_H */ diff --git a/src/soc/mediatek/mt8186/mtcmos.c b/src/soc/mediatek/mt8186/mtcmos.c index 314edd536e..621be2776b 100644 --- a/src/soc/mediatek/mt8186/mtcmos.c +++ b/src/soc/mediatek/mt8186/mtcmos.c @@ -3,12 +3,26 @@ #include <device/mmio.h> #include <soc/infracfg.h> #include <soc/mtcmos.h> +#include <soc/spm.h> enum { DISP_PROT_STEP_2_MASK = 0x00000C06, DISP_PROT_STEP_1_MASK = 0x00001800, }; +enum { + TOP_AXI_PROT_EN_3_ADSP_TOP_STEP1 = 0x00001800, + TOP_AXI_PROT_EN_3_ADSP_TOP_STEP2 = 0x00000003, +}; + +void mtcmos_adsp_power_on(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(adsp); i++) + mtcmos_power_on(&adsp[i]); +} + void mtcmos_protect_display_bus(void) { write32(&mt8186_infracfg_ao->infra_topaxi_protecten_clr, @@ -21,3 +35,11 @@ void mtcmos_protect_audio_bus(void) { /* No need to do protection since MT8186 doesn't have audio mtcmos. */ } + +void mtcmos_protect_adsp_bus(void) +{ + write32(&mt8186_infracfg_ao->infra_topaxi_protecten_3_clr, + TOP_AXI_PROT_EN_3_ADSP_TOP_STEP2); + write32(&mt8186_infracfg_ao->infra_topaxi_protecten_3_clr, + TOP_AXI_PROT_EN_3_ADSP_TOP_STEP1); +} |